Intel 830 manual Clock Specifications, FSB Clock BCLK10 and Processor Clocking, Core Frequency

Electrical Specifications

2.7Clock Specifications

2.7.1FSB Clock (BCLK[1:0]) and Processor Clocking

BCLK[1:0] directly controls the FSB interface speed as well as the core frequency of the processor. As in previous generation processors, the Pentium D processor core frequency is a multiple of the BCLK[1:0] frequency. The processor bus ratio multiplier will be set at its default ratio during manufacturing. The Pentium D processor uses a differential clocking implementation.

Table 2-17. Core Frequency to FSB Multiplier Configuration

Multiplication of System Core	Core Frequency	Core Frequency	Notes1, 2
	(133 MHz BCLK/	(200 MHz BCLK/
Frequency to FSB Frequency	533 MHz FSB)	800 MHz FSB)
1/14	RESERVED	2.80 GHz	-
1/15	RESERVED	3 GHz	-
1/16	RESERVED	3.20 GHz	-
1/17	RESERVED	RESERVED	-
1/18	RESERVED	RESERVED	-
1/19	RESERVED	RESERVED	-
1/20	2.66 GHz	RESERVED	-
1/21	RESERVED	RESERVED	-

NOTES:

1.Individual processors operate only at or below the rated frequency.

2.Listed frequencies are not necessarily committed production frequencies.

2.7.2FSB Frequency Select Signals

Upon power up, the front side bus frequency is set to the maximum supported by the individual processor. BSEL[2:0] are open-drain outputs that must be pulled up to VTT, and are used to select the front side bus frequency. Refer to Table 2-10for DC specifications. Table 2-18defines the possible combinations of the signals and the frequency associated with each combination. The frequency is determined by the processor(s), chipset, and clock synthesizer. Individual processors will only operate at their specified front side bus clock frequency.

The Pentium D processor 840, 830, and 820 operate at 800 MHz FSB frequency (selected by a 200 MHz BCLK[1:0] frequency). The Pentium processor 805 operates at 533 MHz FSB frequency (selected by a 133 MHz BCLK[1:0] frequency).

32 Datasheet