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Texas Instruments Understanding ASP Timing for Digital Media System-on-Chip Design

Models: TMS320DM355

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TMS320DM355

Digital Media System-on-Chip (DMSoC)

www.ti.com

SPRS463A –SEPTEMBER 2007 –REVISED SEPTEMBER 2007

Table 2-23. DM355 Pin Descriptions (continued)

Name

BGA Type Group

 

ID

(1)

 

 

Power

PU

Reset

Description (4)

Mux Control

Supply (2)

PD (3)

State

 

 

PRODUCT PREVIEW

DDR_DQS[0]

V12

I/O

DDR

DDR_BA[2]

V8

I/O

DDR

DDR_BA[1]

U7

I/O

DDR

DDR_BA[0]

U8

I/O

DDR

DDR_A13

U6

I/O

DDR

DDR_A12

V7

I/O

DDR

DDR_A11

W7

I/O

DDR

DDR_A10

V6

I/O

DDR

DDR_A09

W6

I/O

DDR

DDR_A08

W5

I/O

DDR

DDR_A07

V5

I/O

DDR

DDR_A06

U5

I/O

DDR

DDR_A05

W4

I/O

DDR

DDR_A04

V4

I/O

DDR

DDR_A03

W3

I/O

DDR

DDR_A02

W2

I/O

DDR

DDR_A01

V3

I/O

DDR

DDR_A00

V2

I/O

DDR

DDR_DQ15

W17

I/O

DDR

DDR_DQ14

V16

I/O

DDR

DDR_DQ13

W16

I/O

DDR

DDR_DQ12

U16

I/O

DDR

DDR_DQ11

W15

I/O

DDR

DDR_DQ10

W14

I/O

DDR

DDR_DQ09

V14

I/O

DDR

DDR_DQ08

U13

I/O

DDR

DDR_DQ07

W13

I/O

DDR

DDR_DQ06

V13

I/O

DDR

DDR_DQ05

W12

I/O

DDR

DDR_DQ04

U12

I/O

DDR

DDR_DQ03

T11

I/O

DDR

DDR_DQ02

U11

I/O

DDR

DDR_DQ01

W11

I/O

DDR

DDR_DQ00

V11

I/O

DDR

DDR_GATE0

W18

I/O

DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

VDD_DDR

in

Data strobe input/outputs for each byte of

 

the 16 bit data bus used to synchronize the

 

data transfers. Output to DDR when writing

 

and inputs when reading.

DQS0: For DDR_DQ[7:0]

out L Bank select outputs. Two are required for 1Gb DDR2 memories.

out L Bank select outputs. Two are required for 1Gb DDR2 memories.

out L Bank select outputs. Two are required for 1Gb DDR2 memories.

out L DDR Address Bus bit 13 out L DDR Address Bus bit 12 out L DDR Address Bus bit 11 out L DDR Address Bus bit 10 out L DDR Address Bus bit 09 out L DDR Address Bus bit 08 out L DDR Address Bus bit 07 out L DDR Address Bus bit 06 out L DDR Address Bus bit 05 out L DDR Address Bus bit 04 out L DDR Address Bus bit 03 out L DDR Address Bus bit 02 out L DDR Address Bus bit 01 out L DDR Address Bus bit 00

in

DDR Data Bus bit 15

in

DDR Data Bus bit 14

in

DDR Data Bus bit 13

in

DDR Data Bus bit 12

in

DDR Data Bus bit 11

in

DDR Data Bus bit 10

in

DDR Data Bus bit 09

in

DDR Data Bus bit 08

in

DDR Data Bus bit 07

in

DDR Data Bus bit 06

in

DDR Data Bus bit 05

in

DDR Data Bus bit 04

in

DDR Data Bus bit 03

in

DDR Data Bus bit 02

in

DDR Data Bus bit 01

in

DDR Data Bus bit 00

 

DDR: Loopback signal for external DQS

 

gating. Route to DDR and back to

 

DDR_STRBEN_DEL with same constraints

 

as used for DDR clock and data.

DDR_GATE1

V17 I/O DDR

VDD_DDR

DDR: Loopback signal for external DQS

 

gating. Route to DDR and back to

 

DDR_STRBEN with same constraints as

 

used for DDR clock and data.

42

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Texas Instruments TMS320DM355 warranty Name BGA Type Group, Reset Description, State
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TMS320DM355 specifications

The Texas Instruments TMS320DM355 is a versatile digital signal processor designed to support a wide array of multimedia applications, specifically in the realms of digital video and audio processing. As part of the TMS320 family of digital signal processors, the DM355 brings a blend of computational power, energy efficiency, and integrated features that make it highly effective for tasks such as video encoding, decoding, and general signal processing.

One of the standout features of the DM355 is its advanced DaVinci architecture, which is specifically optimized for multimedia tasks. This architecture integrates both DSP and application processing functionalities. The dual-core architecture includes a high-performance DSP core that specializes in real-time signal processing alongside an ARM926EJ-S RISC microprocessor, facilitating the execution of complex algorithms and control tasks.

The DM355 offers robust multimedia processing capabilities with support for several video formats, including MPEG-2, MPEG-4, H.264, and JPEG. This enables developers to create powerful video applications for a variety of devices, from industrial systems to consumer electronics. Its processing capabilities extend to audio processing, allowing it to efficiently handle audio codecs and enhance audio quality in applications ranging from IP cameras to set-top boxes.

In terms of connectivity, the TMS320DM355 supports various interfaces including USB 2.0, Ethernet, and various serial interfaces like UART, SPI, and I2C. This wide range of connectivity options ensures that the DM355 can easily interface with different peripherals and network components, making it a suitable choice for networked applications.

Energy efficiency is another significant advantage of the DM355. With a focus on low power consumption, the device is designed to operate effectively in battery-powered and heat-sensitive environments. Its low thermal design power allows for extended operational life and reduced thermal management requirements, making it ideal for portable devices.

Furthermore, the DM355 is supported by a comprehensive software development framework, including the TI Code Composer Studio and a range of middleware tools, which streamline application development and speed up time to market. Its rich ecosystem enhances its usability across different applications, ensuring that developers can leverage the full potential of the hardware.

In summary, the Texas Instruments TMS320DM355 stands out as a powerful yet cost-effective DSP solution, combining advanced multimedia processing capabilities, robust connectivity options, and energy efficiency. Its unique architecture and extensive support resources make it a preferred choice for developers seeking to create innovative multimedia solutions.