Texas Instruments TMS320DM355 warranty 10 USB, 10.1 USB2.0 Electrical Data/Timing, Mbps

TMS320DM355

Digital Media System-on-Chip (DMSoC)

www.ti.com

SPRS463A –SEPTEMBER 2007 –REVISED SEPTEMBER 2007

5.10USB 2.0

DM355 includes a USB Controller Module that is built around the Mentor USB Multi-Point High-Speed Dual Role Controller, endpoint memory, CPPI DMA controller and UTMI+ PHY. The controller conforms to USB 2.0 Specification. The USB2.0 peripheral supports the following features:

∙USB 2.0 peripheral at speeds high speed (HS: 480 Mb/s) and full speed (FS: 12 Mb/s)

∙USB 2.0 host at speeds HS, FS, and low speed (LS: 1.5 Mb/s)

∙All transfer modes (control, bulk, interrupt, and isochronous)

∙Four Transmit (TX) and four Receive (RX) endpoints in addition to endpoint 0

∙FIFO RAM

–4K endpoint

–Programmable FIFO size

∙Connects to a standard UTMI+ PHY with a 60 MHz, 8-bit interface

∙Includes a DMA sub-module that supports four TX and four RX channels of CPPI 3.0 DMAs

∙RNDIS mode for accelerating RNDIS type protocols using short packet termination over USB

∙USB OTG extensions, i.e. session request protocol (SRP) and host negotiation protocol (HNP)

The USB2.0 peripheral does not support the following features:

∙On-chip charge pump

∙High bandwidth ISO mode is not supported (triple buffering)

∙16-bit 30 MHz UTMI+ interface is not supported

∙RNDIS mode acceleration for USB sizes that are not multiples of 64 bytes

∙Endpoint max USB packet sizes that do not conform to the USB 2.0 spec (for FS/LS: 8, 16, 32, 64,

and 1023 are defined; for HS: 64, 128, 512, and 1024 are defined)

5.10.1USB2.0 Electrical Data/Timing

Table 5-25. Switching Characteristics Over Recommended Operating Conditions for USB2.0 (see

Figure 5-33)

					DM355
NO.		PARAMETER	LOW SPEED		FULL SPEED		HIGH SPEED (1)		UNIT
			1.5 Mbps		12 Mbps		480 Mbps
			MIN	MAX	MIN	MAX	MIN	MAX
1	t	Rise time, USB_DP and USB_DM signals(2)	75	300	4	20	0.5		ns
	r(D)
2	t	Fall time, USB_DP and USB_DM signals(2)	75	300	4	20	0.5		ns
	f(D)
3	t	Rise/Fall time, matching(3)	80	125	90	111.11			%
	frfm
4	V	Output signal cross-over voltage(2)	1.3	2	1.3	2			V
	CRS
5	tjr(source)NT	Source (Host) Driver jitter, next transition		2		2			ns
	tjr(FUNC)NT	Function Driver jitter, next transition		25		2			ns
6	t	Source (Host) Driver jitter, paired transition(4)		1		1			ns
	jr(source)PT
	tjr(FUNC)PT	Function Driver jitter, paired transition		10		1			ns
7	tw(EOPT)	Pulse duration, EOP transmitter	1250	1500	160	175			ns
8	tw(EOPR)	Pulse duration, EOP receiver	670		82				ns
9	t(DRATE)	Data Rate		1.5		12		480	Mb/s
10	ZDRV	Driver Output Resistance	–	–	28	49.5	40.5	49.5	Ω

(1)For more detailed specification information, see the Universal Serial Bus Specification Revision 2.0, Chapter 7. Electrical.

(2)Low Speed: CL = 200 pF, Full Speed: CL = 50 pF, High Speed: CL = 50 pF

(3)tfrfm = (tr/tf) x 100. [Excluding the first transaction from the Idle state.]

(4)tjr = tpx(1) - tpx(0)

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