Texas Instruments TMS320DM355 warranty Power-Supply Sequencing, Power-Supply Design Considerations

TMS320DM355

Digital Media System-on-Chip (DMSoC)

www.ti.com

SPRS463A –SEPTEMBER 2007 –REVISED SEPTEMBER 2007

5.3.1Power-Supply Sequencing

In order to ensure device reliability, the DM355 requires the following power supply power-on and power-off sequences. See table Table 5-1for a description of DM355 power supplies.

Power-On:

1.Power on 1.3 V: CVDD, VDDA_PLL1/2, VDDD13_USB, VDDA13_USB

2.Power on 1.8 V: VDD_DDR, VDDA18, VDDA18_DAC

3.Power on 3.3 V: DVDD, VDDA33_DDRDLL, VDDA33_USB, VDDA33_USB_PLL, VDD_VIN, VDD_VOUT

You may power-on the 1.8 V and 3.3 V power supplies simultaneously.

Power-Off:

1.Power off 3.3 V: DVDD, VDDA33_DDRDLL, VDDA33_USB, VDDA33_USB_PLL, VDD_VIN, VDD_VOUT

2.Power off 1.8 V: VDD_DDR, VDDA18, VDDA18_DAC

3.Power off 1.3 V: CVDD, VDDA_PLL1/2, VDDD13_USB, VDDA13_USB

You may power-off the 1.8 V and 3.3 V power supplies simultaneously.

Note that when booting the DM355 from OneNAND, you must ensure that the OneNAND device is ready with valid program instructions before the DM355 attempts to read program instructions from it. In particular, before you release DM355 reset, you must allow time for OneNAND device power to stabilize and for the OneNAND device to complete its internal copy routine. During the internal copy routine, the OneNAND device copies boot code from its internal non-volatile memory to its internal boot memory section. Board designers typically achieve this requirement by design of the system power and reset supervisor circuit. Refer to your OneNAND device datasheet for OneNAND power ramp and stabilization times and for OneNAND boot copy times.

5.3.1.1Power-Supply Design Considerations

Core and I/O supply voltage regulators should be located close to the DM355 to minimize inductance and resistance in the power delivery path. Additionally, when designing for high-performance applications utilizing the device, the PC board should include separate power planes for core, I/O, and ground, all bypassed with high-quality low-ESL/ESR capacitors.

5.3.1.2Power-Supply Decoupling

In order to properly decouple the supply planes from system noise, place as many capacitors (caps) as possible close to . These caps need to be close to the power pins, no more than 1.25 cm maximum distance to be effective. Physically smaller caps, such as 0402, are better because of their lower parasitic inductance. Proper capacitance values are also important. Small bypass caps (near 560 pF) should be closest to the power pins. Medium bypass caps (220 nF or as large as can be obtained in a small package) should be next closest. TI recommends no less than 8 small and 8 medium caps per supply be placed immediately next to the BGA vias, using the "interior" BGA space and at least the corners of the "exterior".

Larger caps for each supply can be placed further away for bulk decoupling. Large bulk caps (on the order of 100 μF) should be furthest away, but still as close as possible. Large caps for each supply should be placed outside of the BGA footprint.

Any cap selection needs to be evaluated from a yield/manufacturing point-of-view. As with the selection of any component, verification of capacitor availability over the product’s production lifetime should be considered. See also Section 5.5.1 and Section 5.5.2 for additional recommendations on power supplies for the oscillator/PLL supplies.

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