Texas Instruments MSP430x11x1 warranty Vcc, Bootstrap loader Starts, Test, Internal

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MSP430x11x1

MIXED SIGNAL MICROCONTROLLER

SLAS241C ± SEPTEMBER 1999 ± REVISED JUNE 2000

boot ROM containing bootstrap loader (continued)

Program execution begins with the bootstrap vector at 0C00h (boot ROM) if a minimum of two positive edges have been applied to TEST while RST/NMI is low, and TEST is high when RST/NMI goes from low to high. The TEST signal is normally used internally to switch pins P1.4, P1.5, P1.6, and P1.7 between their application function and the JTAG function. If the second rising edge at TEST is applied while RST/NMI is held low, the internal TEST signal is held low and the pins remain in the application mode:

VCC

RST/NMI PIN

TEST PIN

Bootstrap loader Starts

TEST

(Internal)

Test mode can be entered again after TEST is taken low and then back high.

The bootstrap loader will not be started (via the vector in address 0C00h), if:

DThere were less than two positive edges at TEST while RST/NMI is low

DTEST is low if RST/NMI goes from low to high

DJTAG has control over the MSP430 resources

DSupply voltage VCC drops and a POR is executed

WARNING:

The bootstrap loader starts correctly only if the RST/NMI pin is in reset mode. If it is switched to the NMI function, unpredictable program execution may result. However, a bootstrap-load may be started using software and the bootstrap vector, for example the instruction BR &0C00h.

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Contents Tssop MSP430x11x1Description Pulldown resistor of 30 k Ω is needed on F11x1 Functional block diagramAvailable Options Packaged Devices PIN Sowb PIN TssopTerminal Description Name Terminal FunctionsShort-form description Processing unitInstruction Word Formats Address Mode DescriptionsCPU Instruction setOperation modes and interrupts Low-power consumption capabilitiesSCG1 SCG0 Status register R2SCG1 SCG0CCIFG1, CCIFG2, Taifg Interrupt vector addressesCaifg WdtifgNmiifg Special function registersWdtifg OfifgMemory organization Boot ROM containing bootstrap loaderFunctions of the bootstrap loader VCC RST/NMI PIN Test PIN Features of the bootstrap loader areHardware resources used for serial input/output WDTInternal Bootstrap loader StartsVCC TestFlash memory control register FCTL1 Flash memoryWRT Flash memory, timing generator, control register FCTL2Erase 0128h, bit1, Erase a segment Aclk Flash memory control register FCTL3FN0±FN5 SSEL0, SSEL1Wait BusyKeyv AccvifgEmex Flash memory, interrupt and security key violationLock Nmirs AccvPUC POROscillator and system clock PeripheralsDigital I/O Clock SignalsTimerA Three capture/compare registers Watchdog timerTimerA, MSP430x11x1 Configuration TimerA 3 capture/compare registersComparatorA CATCTL2.7 CaoutCAF CACTL2.4CACTL2 Slope a/d conversionCACTL1 Caex Caon Caies Caifg Rsel REF1 REF0Peripheral file map Peripherals with Word AccessPeripherals with Byte Access MIN NOM MAX Units Absolute maximum ratings²Recommended operating conditions Frequency vs Supply Voltage MSP430x11x1 DevicesILPM3 Parameter Test Conditions MIN TYP MAX UnitIAM ILPM2Leakage current Outputs Port 1 to P2 P1.0 to P1.7, P2.0 to P2.5Port P1, P2 P1.x to P2.x Internal signals TAx, Smclk at TimerAInputs Px.x, TAx Parameter Test Conditions VCC MIN TYP MAX UnitComparatorA see Note Outputs P1.x, P2.x, TAxVRefVT vs Temperature, VCC = 2.2 V, C1121 VRefVT vs Temperature, VCC = 3 V, C1121CAF Caon PUC/PORParameter MIN NOM MAX Unit RAMDCO Steps DCOVariance Max DcoclkJTAG/programming Principle characteristics of the DCOWake-up from lower power modes LPMx GND Input/output schematicPort P1, P1.0 to P1.3, input/output with Schmitt-trigger P1IFG.5 P1IES.5 P1DIR.4 P1OUT.4 SmclkP1IFG.4 P1IES.4 P1DIR.5 P1OUT.5CAPD.X Port P2, P2.0 to P2.2, input/output with Schmitt-triggerP2DIR.4 P2OUT.4 Port P2, P2.3 to P2.4, input/output with Schmitt-triggerP2DIR.3 P2OUT.3 P2IFG.3 P1IES.3P2IRQ.5 P2SEL.5 VCCP2DIR.5 P2OUT.5Port P2, unbonded bits P2.6 and P2.7 PIN Shown Pins DIM MAXDW R-PDSO-G Plastic SMALL-OUTLINE Package15 NOM Gage Plane Seating Plane 20 MAX Pins ShownPins DIM MAX MIN PW R-PDSO-G Plastic SMALL-OUTLINE PackageImportant Notice