Texas Instruments MSP430x11x1 Parameter Test Conditions MIN TYP MAX Unit, Iam, ILPM2, ILPM3

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MSP430x11x1

MIXED SIGNAL MICROCONTROLLER

SLAS241C ± SEPTEMBER 1999 ± REVISED JUNE 2000

electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

supply current (into VCC) excluding external current (f(system) = 1 MHz)

 

PARAMETER

 

TEST CONDITIONS

 

 

 

MIN

TYP

MAX

UNIT

 

 

 

 

 

 

 

 

 

 

 

 

 

TA = ±40°C +85°C,

VCC = 2.2 V

 

160

200

A

 

 

 

f(MCLK) = f(SMCLK) = 1 MHz,

 

 

 

 

 

 

 

 

 

VCC = 3 V

 

240

300

 

 

C11x1

f(ACLK) = 32,768 Hz

 

 

 

 

 

°

°

V

CC

= 2.2 V

 

1.3

2

 

 

 

 

TA = ±40 C +85 C,

 

 

 

 

 

A

I(AM)

Active mode

 

f(MCLK) = f(SMCLK) = f(ACLK) = 4096 Hz

VCC = 3 V

 

2.5

3.2

 

 

 

 

TA = ±40°C +85°C,

VCC = 2.2 V

 

200

250

A

 

 

 

fMCLK = f(SMCLK) = 1 MHz,

 

 

 

 

 

 

 

 

 

VCC = 3 V

 

300

350

 

 

F11x1

f(ACLK) = 32,768 Hz

 

 

 

 

 

°

°

V

CC

= 2.2 V

 

1.6

3

 

 

 

 

TA = ±40 C +85 C,

 

 

 

 

 

A

 

 

 

f(MCLK) = f(SMCLK) = f(ACLK) = 4096 Hz

VCC = 3 V

 

3

4.3

 

 

 

 

 

 

 

 

TA = ±40°C +85°C,

VCC = 2.2 V

 

30

40

 

 

 

C11x1

f(MCLK) = 0, f(SMCLK) = 1 MHz,

 

 

 

 

 

 

 

 

 

VCC = 3 V

 

51

60

 

I(CPUOff)

Low-power mode,

 

f(ACLK) = 32,768 Hz

 

A

(LPM0)

 

TA = ±40°C +85°C,

VCC = 2.2 V

 

32

45

 

 

F11x1

f(MCLK) = 0, f(SMCLK) = 1 MHz,

 

 

 

 

 

 

 

 

 

VCC = 3 V

 

55

70

 

 

 

 

f(ACLK) = 32,768 Hz

 

 

 

 

 

TA = ±40°C +85°C,

VCC = 2.2 V

 

11

14

A

I(LPM2)

Low-power mode, (LPM2)

f(MCLK) = f(SMCLK) = 0 MHz,

 

 

 

 

 

 

VCC = 3 V

 

17

22

 

 

 

f(ACLK) = 32,768 Hz, SCG0 = 0

 

 

 

Low-power mode, (LPM3)

TA = ±40°C +85°C,

VCC = 2.2 V

 

1.2

1.7

A

I(LPM3)

(C11x1)

f(MCLK) = f(SMCLK) = 0 MHz,

 

 

 

 

 

 

VCC = 3 V

 

2

2.7

 

 

 

f(ACLK) = 32,768 Hz, SCG0 = 1

 

 

 

 

 

TA = ±40°C

 

 

 

 

 

0.8

1.2

 

 

 

 

TA = 25°C

 

VCC = 2.2 V

 

0.7

1

A

I(LPM3)

Low-power mode, (LPM3)

TA = 85°C

 

 

 

 

 

1.6

2.3

 

(F11x1)

TA = ±40°C

 

 

 

 

 

1.8

2.2

 

 

 

 

 

 

 

 

 

 

 

TA = 25°C

 

VCC = 3 V

 

1.6

1.9

A

 

 

 

TA = 85°C

 

 

 

 

 

2.3

3.4

 

 

Low-power mode, (LPM4)

TA = ±40°C

f(MCLK) = 0 MHz,

 

 

 

 

0.1

0.5

 

I(LPM4)

TA = 25°C

f(SMCLK) = 0 MHz,

VCC = 2.2 V/3 V

 

0.1

0.5

A

(C11x1)

 

 

 

 

TA = 85°C

f(ACLK) = 0 Hz, SCG0 = 1

 

 

 

 

0.4

0.8

 

 

Low-power mode, (LPM4)

TA = ±40°C

 

 

 

 

 

0.1

0.5

 

I(LPM4)

TA = 25°C

 

VCC = 2.2 V/3 V

 

0.1

0.5

A

(F11x1)

 

 

 

 

 

TA = 85°C

 

 

 

 

 

0.8

1.9

 

NOTE: All inputs are tied to 0 V or VCC. Outputs do not source or sink any current.

current consumption of active mode versus system frequency, C version, F version

IAM = IAM[1 MHz] fsystem [MHz]

current consumption of active mode versus supply voltage, C version

IAM = IAM[3 V] + 105 A/V (VCC±3 V)

current consumption of active mode versus supply voltage, F version

IAM = IAM[3 V] + 120 A/V (VCC±3 V)

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Image 28
Contents Description MSP430x11x1Tssop Functional block diagram Available Options Packaged DevicesPIN Sowb PIN Tssop Pulldown resistor of 30 k Ω is needed on F11x1Terminal Functions Short-form descriptionProcessing unit Terminal Description NameAddress Mode Descriptions CPUInstruction set Instruction Word FormatsLow-power consumption capabilities Operation modes and interruptsStatus register R2 SCG1SCG0 SCG1 SCG0Interrupt vector addresses CaifgWdtifg CCIFG1, CCIFG2, TaifgSpecial function registers WdtifgOfifg NmiifgFunctions of the bootstrap loader Boot ROM containing bootstrap loaderMemory organization Features of the bootstrap loader are Hardware resources used for serial input/outputWDT VCC RST/NMI PIN Test PINBootstrap loader Starts VCCTest InternalFlash memory Flash memory control register FCTL1Erase 0128h, bit1, Erase a segment Flash memory, timing generator, control register FCTL2WRT Flash memory control register FCTL3 FN0±FN5SSEL0, SSEL1 AclkBusy KeyvAccvifg WaitLock Flash memory, interrupt and security key violationEmex Accv PUCPOR NmirsPeripherals Oscillator and system clockClock Signals Digital I/OWatchdog timer TimerA Three capture/compare registersTimerA 3 capture/compare registers TimerA, MSP430x11x1 ConfigurationComparatorA Caout CAFCACTL2.4 CATCTL2.7Slope a/d conversion CACTL1Caex Caon Caies Caifg Rsel REF1 REF0 CACTL2Peripherals with Byte Access Peripherals with Word AccessPeripheral file map Recommended operating conditions Absolute maximum ratings²MIN NOM MAX Units MSP430x11x1 Devices Frequency vs Supply VoltageParameter Test Conditions MIN TYP MAX Unit IAMILPM2 ILPM3Outputs Port 1 to P2 P1.0 to P1.7, P2.0 to P2.5 Leakage currentInternal signals TAx, Smclk at TimerA Inputs Px.x, TAxParameter Test Conditions VCC MIN TYP MAX Unit Port P1, P2 P1.x to P2.xOutputs P1.x, P2.x, TAx ComparatorA see NoteVRefVT vs Temperature, VCC = 3 V, C1121 VRefVT vs Temperature, VCC = 2.2 V, C1121PUC/POR CAF CaonRAM Parameter MIN NOM MAX UnitDCO Variance MaxDcoclk DCO StepsWake-up from lower power modes LPMx Principle characteristics of the DCOJTAG/programming Port P1, P1.0 to P1.3, input/output with Schmitt-trigger Input/output schematicGND P1DIR.4 P1OUT.4 Smclk P1IFG.4 P1IES.4P1DIR.5 P1OUT.5 P1IFG.5 P1IES.5Port P2, P2.0 to P2.2, input/output with Schmitt-trigger CAPD.XPort P2, P2.3 to P2.4, input/output with Schmitt-trigger P2DIR.3 P2OUT.3P2IFG.3 P1IES.3 P2DIR.4 P2OUT.4P2SEL.5 VCC P2DIR.5P2OUT.5 P2IRQ.5Port P2, unbonded bits P2.6 and P2.7 Pins DIM MAX DW R-PDSO-GPlastic SMALL-OUTLINE Package PIN ShownPins Shown Pins DIM MAX MINPW R-PDSO-G Plastic SMALL-OUTLINE Package 15 NOM Gage Plane Seating Plane 20 MAXImportant Notice