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A-MNL-NIOSPROG-01.1 manual
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122 pages, 1.86 Mb
A-MNL-NIOSPROG-01.1
Nios Embedded Processor
101 Innovation Drive
San Jose, CA 95134
(408) 544-7000
http://www.altera.com
Programmer’s Reference Manual
July 2001
Version 1.1.1
Contents
Main
Page
About this Manual
How to Contact Altera
Getting
Typographic Conventions
v 1 r f
Page
Contents
Contents
Page
Page
Page
List of Tables
Page
Overview
Introduction
Audience
Nios CPU
Instruction Set
Register
General-Purpose Registers
Altera Corporation 3
Table 6. Programmers Model
The K Register
The Program Counter
Control Registers
Page
Page
CLR_IE(%ctl8)
Memory Access
Reading from Memory (or Peripherals)
Writing to Memory (or Peripherals)
Addressing Modes
5/16-bit Immediate Value
Page
Full Width Register-Indirect
Partial Width Register-Indirect
Full Width Register-Indirect with Offset
Partial Width Register-Indirect with Offset
Program-Flow Control
Relative-Branch Instructions
Absolute-Jump Instructions
Trap Instructions
Conditional Instructions
Exceptions
Exception Handling Overview
Exception Vector Table
External Hardware Interrupt Sources
Internal Exception Sources
Register Window Underflow
Register Window Overflow
Direct Software Exceptions (TRAP Instructions)
Exception Processing Sequence
Register Window Usage
Status Preservation: ISTATUS Register
Return-Address
Simple and Complex Exception Handlers
Simple Exception Handlers
Complex Exception Handlers
Pipeline Implementation
Pipeline Operation
Branch Delay Slots
Direct CWP Manipulation
Table 16. Notation Details Notation Meaning Notation Meaning
Instruction Format (Sheet 1 of 2)
Instruction Format (Sheet 2 of 2)
Table 17. 32-bit Major Opcode Ta ble (Sheet 1 of 3)
Table 17. 32-bit Major Opcode Ta ble (Sheet 2 of 3)
Table 17. 32-bit Major Opcode Ta ble (Sheet 3 of 3)
Page
Page
32-Bit Instruction Set
Set
ABS
Absolute Value
ADD
Add Without Carry
ADDI
Add Immediate
AND
Bitwise Logical AND
ANDN
Bitwise Logical AND NOT
ASR
Arithmetic Shift Right
ASRI
Arithmetic Shift Right Immediate
BGEN
Bit Generate
BR
Branch
BSR
Branch To Subroutine
CALL
Call Subroutine
CMP
Compare
CMPI
Compare Immediate
EXT16d
Half-Word Extract (Dynamic)
EXT16s
Half-Word Extract (Static)
EXT8d
Byte-Extract (Dynamic)
EXT8s
Byte-Extract (Static)
FILL16
Half-Word Fill
FILL8
Byte-Fill
IF0
Equivalent to SKP1 Instruction
IF1
Equivalent to SKP0 Instruction
IFRnz
Equivalent to SKPRz Instruction
IFRz
Equivalent to SKPRnz Instruction
IFS
Conditionally Execute Next Instruction
1
JMP
Computed Jump
LD
Load 32-bit Data From Memory
LDP
Load 32-bit Data From Memory (Pointer A ddressing Mode)
LDS
Load 32-bit Data From Memory (Stack Ad dressing Mode)
LRET
Equivalent to JMP %o7
LSL
Logical Shift Left
LSLI
Logical Shift Left Immediate
LSR
Logical Shift Right
LSRI
Logical Shift Right Immediate
MOV
Register-to-Register Move
MOVHI
Move Immediate Into High Half-Word
MOVI
Move Immediate
MSTEP
Multiply-Step
MUL
Multiply
NEG
Arithmetic Negation
NOP
Equivalent to MOV %g0, %g0
NOT
Logical Not
OR
Bitwise Logical OR
PFX
Prefix
RDCTL
Read Control Register
RESTORE
Restore Callers Register Window
RET
Equivalent to JMP %i7
RLC
Rotate Left Through Carry
RRC
Rotate Right Through Carry
SAVE
Save Callers Register Window
SEXT16
Sign Extend 16-bit Value
SEXT8
Sign Extend 8-bit Value
SKP0
Skip If Register Bit Is 0
SKP1
Skip If Register Bit Is 1
SKPRnz
Skip If Register Not Equal To 0
SKPRz
Skip If Register Equals 0
SKPS
Skip On Condition Code
1
ST
Store 32-bit Data To Memory
ST16d
Store 16-Bit Data To Memory (Computed Half-Word Po inter Address)
ST16s
Store 16-Bit Data To Memory (Static Half-Word-Offset A ddress)
ST8d
Store 8-Bit Data To Memory (Computed Byte-Point er Address)
ST8s
Store 8-bit Data To Memory (Static Byte-Offset Address)
STP
Store 32-bit Data To Memory (Pointer Addressing Mod e)
STS
Store 32-bit Data To Memory (Stack Addressing Mode)
STS16s
Store 16-bit Data To Memory (Stack-Addressing Mode)
STS8s
Store 8-bit Data To Memory (Stack-Addressing Mode)
SUB
Subtract
SUBI
Subtract Immediate
SWAP
Swap Register Half-Words
TRAP
Unconditional Trap
TRET
Trap Re turn
WRCTL
Write Control Register
XOR
Bitwise Logical Exclusive OR
Page
Index
Index
Numerics
A
B
F
G
H
I