Excalibur electronic A-MNL-NIOSPROG-01.1 manual Writing to Memory or Peripherals

Overview

Writing to Memory (or Peripherals)

The Nios CPU can perform aligned writes to memory in widths of byte, half-word, or word (only the 32-bit Nios CPU can write a word). A word (32-bit Nios CPU) can be written to any address that is a multiple of 4 in one instruction. A half-word can be written to any address that is a multiple of 2 in one instruction (16-bit Nios CPU) or two instructions (32-bit Nios CPU). A byte can be written to any address in two instructions.

On the 32-bit Nios CPU, the lowest byte of a register can be written only to an address that is a multiple of 4; the middle-low byte of a register can be written only as an address that is a multiple of 4, plus 1, and so on.

Similarly, on the 16-bit Nios CPU, the low byte of a register can be written only to an even address and the high byte of a register can only be written to an odd address.

The 32-bit Nios CPU can also write the low half-word of a register to an address that is a multiple of four, and the high half-word of a register to an address which is a multiple of 4, plus 2.

The ST instruction writes a full native-word to a native-word aligned memory address from any register; the ST8d and ST16d (32-bit Nios CPU only) instructions write a byte and half-word, respectively, with the alignment constraints described above, from register %r0.

Often it is necessary for software to write a particular byte or half-word to an arbitrary location in memory. The position within the source register may not happen to correspond with the location in memory to be written. The FILL8 and FILL16 (32-bit Nios CPU only) instructions will take the lowest byte or half-word, respectively, of a register and replicate it across register %r0.

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Overview

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