HP 16500C, 16501A LOGIC manual Index, Data

Index

A

Activation record, 1–6 Address bus, 4–10 Address ranges, 1–3 Analyzer

concepts, 4–2 Analyzer problems, 5–3

capacitive loading, 5–4 intermittent data errors, 5–3

no activity on activity indicators, 5–4

no setup/hold field on format screen, 5–4 unwanted triggers, 5–3

Anystate, 1–5, 2–4, 4–5 Arm input, 2–2

Arm level, 1–24 Arm signal, 1–23 Arming Control menu

See Intermodule Measurements ASCII format, 3–16

files, 3–16

Asynchronous interrupt request trigger on, 2–16

B

Binary format, 3–16

Branch conditions, 4–4

Bus contention, 1–21

C Cautions

power down analyzer and target system, 5–2

Chip select lines, 2–20 Configuration tree

arming modules, 2–4 Control signals, 1–24 Coprocessor systems

debugging, 2–19 Cross arming

See Intermodule Measurements

D Data

triggering on bad, 1–10 Data bus, 4–10

Data files

in ASCII format, 3–16 in binary format, 3–16

E

Else-if branch, 4–5

Encapsulated PostScript files, 3–10 Entry address, 1–3

Error Messages, 5–12 External instrument

starting or stopping, 2–8

F

Falling edge, 2–6

File description, 3–4

File management, 3–2

File manager, 3–18

File name, 3–4

First statement, 1–3

Flexible disk, 3–8

Flexible disk actions, 3–3

Function entry triggering, 1–8

G

Glitch detection "*", 2–14 to 2–15 timing analyzer, 2–14

Glitch waveforms, 2–2, 2–15 Graphics files

B/W TIF, 3–10 color TIF, 3–10 EPS, 3–10 PCX, 3–10 transferring, 3–18

Graphics images, 3–10 Ground bounce, 2–14 Group boundaries, 4–9

Group Run Armed from PORT IN field, 2–6 Group Run field, 2–4

Group Run tree arming modules, 2–4

Group runs, 2–6 Groups, 4–7

H

Handshake violation, 1–20

I

I/O activity, 2–20

If branch, 4–4

Independent clocks, 2–22

Independent lookup, 4–12

Independent modules, 2–4 Initialization code, 1–6 Interleaved trace lists, 2–21 Intermodule bus arming signals, 2–2 Intermodule Measurement problems, 5–11

an event wasn’t captured, 5–11 Intermodule Measurements, 2–2 adjust for minimum skew, 2–28

independent state and timing analyzers, 2–14

seeing the status of a module, 2–10 time correlation, 2–12

Intermodule menu, 2–4 Internal clock, 2–12 Interrupt processing, 2–16 Invasm key, 4–10

Inverse Assembler, 4–2, 4–10 Inverse Assembler problems, 5–9

incorrect inverse assembly, 5–9 inverse assembler will not load or run,

5–10

no inverse assembly, 5–9

L

LAN Interface files, 3–13

Loop iteration triggering, 1–5

M

Manual acquisition mode, 2–14 Masked interrupts, 2–16 Maximum states, 4–3 Measurement configurations

loading, 3–6 saving, 3–4

Menus

saving as graphics images, 3–10 Minimum states, 4–3

Mixed Display mode, 2–21 Module delays

skew adjustment accuracy, 2–26 Modules

Running status, 2–10 status interpretation, 2–10 Stopped status, 2–10

Index–1