Triggering

To look at control and status signals during execution of a routine

To look at control and status signals during execution of a routine

The state analyzer will trigger on the start of the routine whose control and status signals are to be examined with finer resolution than once per bus cycle. When it triggers, it will switch its “arm” level true. The timing analyzer will trigger when it receives the true arm level and detects the transition represented by glitch/edge1.

1Select the state analyzer Trigger menu and define term R_START to represent the starting address of the routine.

2Under State Sequence Levels, enter the following sequence specification:

While storing “anystate” TRIGGER on “R_START” 1 time

Store “anystate”

3Select the timing analyzer Trigger menu.

4Define the Edge1 term to represent a transition on one of the control signals.

5Under Timing Sequence Levels, enter the following sequence specification:

TRIGGER on “arm Edge1” 1 time

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HP 16501A LOGIC, 16500C manual Trigger on arm ∙ Edge1 1 time