Intel IQ80321 manual Debug Interface

Intel® IQ80321 I/O Processor Evaluation Platform

Contents

	3.7.4	Rotary Switch			42
	3.7.5	Battery Status			43
3.8	Debug Interface		..................................................................................................................		44
	3.8.1	Console Serial Port			44
	3.8.2	Ethernet Port			44
		3.8.2.1	Intel® 82544EI Gigabit Ethernet Controller		44
	3.8.3	JTAG Debug			45
		3.8.3.1	JTAG Port		45
	3.8.4	Logic-Analyzer Connectors			45
	3.8.5	Mictor J3F2			46
	3.8.6	Mictor J2F1			47
	3.8.7	Mictor J1C1			48
	3.8.8	Mictor J3C1			49
	3.8.9	Mictor J2C1			50
3.9	Board Reset Scheme				51
3.10	Switches and Jumpers				52
	3.10.1	Switch Summary			52
	3.10.2	PCIX Initialization Summary			53
		3.10.2.1	User Defined Switches		53
		3.10.2.2	PCI-X Bridge Initialization Signals		53
	3.10.3	Default Switch Settings - Visual			54
	3.10.4	Jumper Summary			55
	3.10.5	Connector Summary			55
	3.10.6	General Purpose Input/Output Header			55
	3.10.7	Secondary PCI/PCI-X Operation Settings			56
	3.10.8	Primary PCI/PCI-X Operation Settings			56
	3.10.9	Detail Descriptions of Switches/Jumpers			57
		3.10.9.1	Switch S7E1- 2/3		57
			3.10.9.1.1 S7E1-2: RST_MODE		57
			3.10.9.1.2 S7E1-3: RETRY		57
			3.10.9.1.3	Operation Setting Summary Descriptions	57
		3.10.9.2	Switch S7E1- 4/5		58
			3.10.9.2.1	Switch S7E1 - 4	58
			3.10.9.2.2	Switch S7E1 - 5	58
		3.10.9.3	Switch S7E1- 6/7		58
		3.10.9.4	Switch S7E1- 8		59
		3.10.9.5	Switch S8E1- 2		60
		3.10.9.6	Switch S8E1- 3		60
		3.10.9.7	Switch S8E1- 4		60
		3.10.9.8	Switch S8E1- 5		61
			3.10.9.8.1	Switch S8E1 - 5: Descriptions	61
		3.10.9.9	Switch S8E1- 6		61
		3.10.9.10 Switch S8E1- 7			62
		3.10.9.11 Switch S8E1- 8			62
		3.10.9.12 Switch S8E2 - 1/2			63
		3.10.9.13 Switch S8E2 - 4			63
		3.10.9.14 Switch S9E1 - 1:3			64
		3.10.9.15 Switch S9E1 - 4			64
		3.10.9.16 Switch S1D1 - 1/2			65
		3.10.9.17 Switch S4D1 - 1/2			65
		3.10.9.18 Switch S4D1 - 3/4			65
		3.10.9.19 Jumper J1G2			66

4 Board Manual