44 Board Manual
Intel® IQ80321 I/O Processor Evaluation Platform
Hardware Reference Section
3.8 Debug Interface

3.8.1 Console Serial Port

The platform has one serial port for debug purposes a s described in Section 3 .7 , “In te l ® IQ80321
Evaluation Platform Board Peripheral Bus” on page38.

3.8.2 Ethernet Port

The IQ80321 supports an Int el® 82544EI Gigabit Ethernet Controller on the secondary PCI-X bus.

3.8.2.1 Intel® 82544EI Gigabit Ethernet Controller

The Intel® 82544EI Gigabit Ethernet Controller is an integrated third-generation Ethern et LAN
component capable of providin g 1000, 100, and 10 Mb/s data rates. It is a single-chip de vice,
containing both the MAC and PHY layer functions, and o ptimized for LAN on Motherb oard (LOM)
designs, enterprise networking, and Internet appliances that use the Periph eral Component
Interconnect (PCI) and P CI-X bus back-planes .
The 82544EI utilizes a 32/64-bit, 33/66 MHz direct-interface to the PC I bus, compliant with the PCI
Local Bus Specification, Revision 2.2. It also supports the PCI-X Addendum to the PCI Local Bus
Specification, Revision 1.0a. The controller interfaces with the 8 0321 through on-chip
command/status registers and using a shared memory area.
The physical layer circuitry provides an IEEE 802.3 Ethernet interface for 1000BASE-T,
100BASE-TX and 10BASE- T applications.
For programming info rmation please refer t o the Intel® 82544EI/ 82544GC Gigabit Ethernet
Controller Software Developer’s Manual.