62 Board Manual
Intel® IQ80321 I/O Processor Evaluation Platform
Hardware Reference Section
3.10.9.10 Switch S8E1- 7
Used to enable the IDSEL reroute function at reset or power-up. The reset value of the secondary bus
private device mask register is modified according to the tie va lue of the IDSEL_REROUTE_EN pin.
0 = on: reset value of the secondary bus private device mask register is x00000000.
1 = off: r eset value of the second ary bus private device m ask register is x22F20000.
3.10.9.11 Switch S8E1- 8
Used to enable the opaque memory region at reset or power-up. The reset value o f bit 0 of the
opaque memory enable register is modified according to the tie value of the OPAQUE_EN pin.
0 = on: reset value of b it 0 of the opaque m emory enable regis ter is b0.
1 = off: r eset value of bit 0 of th e opaque memory enable re gister is b1.
This register enables the opaque memory base, opaque memory limit, opaq ue memory base upper
32 bits, and the opaque memory limit upper 32 bits registers. These registers specify a range of 64-bit
memory addresses that are used exclusively on the secondary PCI bus and are not to be accepted by
the bridge on either the primary or secondary inte rfaces.
Table 58. Switch S8E1 - 7: Descriptions
Switch Assoc iation Description Factory Defau lt
S8E1-7 PCI-X Bridge IDSEL_REROUTE_EN: S ets the value of SPCI-X
private device mask . Off
Table 59. Switch S8E1 - 7: Settings and Operation Mode
S8E1-7 Operation Mode
Off PCI-X Bridge hides the devices that using pr ivate space address lines.
On PCI-X Bridge does not hide any devices.
Table 60. Switch S8E1 - 8: Descriptions
Switch Assoc iation Description Factory Defau lt
S8E1-8 PCI-X Bridge OPAQUE-EN: controls OPAQUE memory register. Off
Table 61. Switch S8E1 - 8: Settings and Operation Mode
S8E1-1 Operation Mode
Off Enables opaque.
On No opaque.