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70 Board Manual
Intel® IQ80321 I/O Processor Evaluation Platform
External RAID Section
4.2 Interrupt RoutingThe interrupt lines for devic es on the SPCI-X bus ( Expansion Slot and Intel ® 82544 Gigabit Ethernet
Controllerr) are routed based on requirements.
Table 87. Interrupt Routing for Secondary PCI-X Private Device
Number Description
4.2.1 The INTA# and INTB# of PCI -X Expansion Slot are routed to XIN T0# and XINT1# Exte rnal
Interrupt inputs on the Intel® 80321 I/O processor.
4.2.2 The INTA# of Intel 82544 Controller is routed to XINT2# External Interrupt input on the
80321.
4.2.3 The interrupt routin g scheme is based on Figure 18.
Figure 18. Interrupt Routing for Private Device Configuration
A9460-02
XINT0#
Intel® 80321 I/O Processor
INTA#
INTB#
INTC#
INTD#
INTA#
INTA#
INTB#
INTA#
INTB#
INTC#
INTD#
MUX
XINT2#
MUX
XINT3#
PPCI-X Bus
MUX
SPCI-X Slot
Intel
®
82544
Gigabit Ethernet