5-2

Itanium® 2 Processor Package Thermocouple Location

77

6-1

Logical Schematic of SMBus Circuitry

80

Tables

2-1

Itanium® 2 Processor System Bus Signal Groups

16

2-2

Itanium® 2 Processor Package Specifications

17

2-3

Itanium® 2 Processor Power Supply Specifications

18

2-4

AGTL+ Signals DC Specifications

18

2-5

Power Good Signal DC Specifications

19

2-6

System Bus Clock Differential HSTL DC Specifications

19

2-7

TAP Connection DC Specifications

19

2-8

SMBus DC Specifications

20

2-9

LVTTL Signal DC Specifications

20

2-10

System Bus Clock Differential HSTL AC Specifications

20

2-11

SMBus AC Specifications

21

2-12

Itanium® 2 Processor Absolute Maximum Ratings

22

2-13

Source Synchronous AGTL+ Signal Group and Wired-OR Signal Group

 

 

Absolute Overshoot/Undershoot Tolerance

26

2-14

Itanium® 2 Processors (900 MHz, 1.0 GHz, 1.3 GHz, 1.4 GHz, 1.5 GHz/6 MB)

 

 

Source Synchronous AGTL+ Signal Group Time Dependent

 

 

Overshoot/Undershoot Tolerance for 400 MHz System Bus

26

2-15

Itanium® 2 Processors (1.5 GHz/4 MB, 1.6 GHz) Source

 

 

Synchronous AGTL+ Signal Group Time-Dependent

 

 

Overshoot/Undershoot Tolerance for 400 MHz System Bus

27

2-16

Itanium® 2 (9 MB) Processors Source Synchronous AGTL+

 

 

Signal Group Time-Dependent Overshoot/Undershoot Tolerance

 

 

for 533 MHz System Bus

27

2-17

Itanium® 2 Processors (1.66 GHz) Source Synchronous AGTL+

 

 

Signal Group Time-Dependent Overshoot/Undershoot Tolerance

 

 

for 667 MHz System Bus

28

2-18

Itanium® 2 Processors (900 MHz, 1.0 GHz, 1.3 GHz, 1.4 GHz,

 

 

1.5 GHz/6 MB) Wired-OR Signal Group

 

 

(BINIT#, HIT#, HITM#, BNR#, TND#, BERR#)

 

 

Overshoot/Undershoot Tolerance for 400 MHz System Bus

28

2-19

Itanium® 2 Processors (1.5 GHz/4 MB, 1.6 GHz) Wired-OR Signal

 

 

Group (BINIT#, HIT#, HITM#, BNR#, TND#, BERR#)

 

 

Overshoot/Undershoot Tolerance for 400 MHz System Bus

29

2-20

Itanium® 2 (9 MB) Processors Wired-OR Signal Group

 

 

(BINIT#, HIT#, HITM#, BNR#, TND#, BERR#) Overshoot/Undershoot

 

 

Tolerance for 533 MHz System Bus

29

2-21

Itanium® 2 (1.66 GHz) Processors Wired-OR Signal Group

 

 

(BINIT#, HIT#, HITM#, BNR#, TND#, BERR#) Overshoot/Undershoot

 

 

Tolerance for 667 MHz System Bus

29

2-22

Itanium® 2 Processor Power Pod Connector Signals

30

2-23

Processor Core Voltage Identification Code

31

2-24

Processor Power States

32

2-25

Itanium® 2 Processor System Bus Ratios

33

2-26

Connection for Unused Pins

35

3-1

Pin/Signal Information Sorted by Pin Name

38

3-2

Pin/Signal Information Sorted by Pin Location

53

5-1

Case Temperature Specification

76

6-1

System Management Interface Signal Descriptions

79

6

Datasheet

Page 6
Image 6
Intel Itanium 2 Processor manual Tables, Binit#, Hit#, Hitm#, Bnr#, Tnd#, Berr#