Intel Itanium 2 Processor System Management Bus Interface, Signal Name Pin Count Description

6System Management Feature Specifications

The Itanium 2 processor includes a system management bus (SMBus) interface. This chapter describes the features of the SMBus and SMBus components.

6.1System Management Bus

6.1.1System Management Bus Interface

The Itanium 2 processor includes an Itanium processor family SMBus interface which allows access to several processor features. The system management components on the processor include two memory components (EEPROMs) and a thermal sensing device (digital thermometer). The processor information EEPROM (PIROM) is programmed by Intel with manufacturing and feature information specific to the Itanium 2 processor. This information is permanently write-protected. Section 6.2 provides detail on the PIROM. The other EEPROM is a scratch EEPROM that is available for other data at the system vendor’s discretion. The thermal sensor can be used in conjunction with the information in the PIROM and/or the Scratch EEPROM for system thermal monitoring and management. The thermal sensing device on the processor provides an accurate means of acquiring an indicator of the junction temperature of the processor core die. The thermal sensing device is connected to the anode and cathode of the Itanium 2 processor on-die thermal diode. SMBus implementation on the Itanium 2 processor uses the clock and data signals as defined by SMBus specifications.

6.1.2System Management Interface Signals

Table 6-1lists the system management interface signals and their descriptions. These signals are used by the system to access the system management components via the SMBus.

Table 6-1. System Management Interface Signal Descriptions

Signal Name	Pin Count	Description
3.3V	1	Voltage supply for EEPROMs and thermal sensor.
SMA[2:0]	3	Address select passed through from socket.
SMSC	1	System management bus clock.
SMSD	1	System management serial address/data bus.
SMWP	1	Scratch EEPROM write protect.
THRMALERT#	1	Temperature alert from the thermal sensor.

Figure 6-1shows the logical schematics of SMBus circuitry on the Itanium 2 processor and shows how the various system management components are connected to the SMBus. The reference to the System Board at the lower left corner of Figure 6-1shows how SMBus address configuration for multiple Itanium 2 processors can be realized with resistor stuffing options.

Datasheet 79