Intel IXP400 manual 17.9

Intel® IXP400 Software

Contents

17.9	Threading			252
17.10 Using the API				252
	17.10.1 API Usage for Intel XScale® Core PMU			253
		17.10.1.1 Event and Clock Counting		253
		17.10.1.2 Time-Based Sampling		255
		17.10.1.3 Event-Based Sampling		257
		17.10.1.4 Using Intel XScale® Core PMU to Determine Cache Efficiency		260
	17.10.2 Internal Bus PMU			261
		17.10.2.1 Using the Internal Bus PMU Utility to Monitor
		Read/Write Activity on the North Bus		262
	17.10.3 Xcycle (Idlecycle Counter)			263
18 Access-Layer Components:
Queue Manager (IxQMgr) API				265
18.1	What’s New			265
18.2	Overview			265
18.3	Features and Hardware Interface			266
18.4	IxQMgr Initialization and Uninitialization			267
18.5	Queue Configuration			267
18.6	Queue Identifiers			267
18.7	Configuration Values			268
18.8	Dispatcher			268
18.9	Dispatcher Modes			269
18.10 Livelock Prevention				272
18.11 Threading				274
18.12 Dependencies				274
19 Access-Layer Components:
Synchronous Serial Port (IxSspAcc) API				275
19.1	What’s New			275
19.2	Introduction			275
19.3	IxSspAcc API Details			275
	19.3.1	Features		275
	19.3.2	Dependencies		276
19.4	IxSspAcc API Usage Models			277
	19.4.1 Initialization and General Data Model			277
	19.4.2	Interrupt Mode		277
	19.4.3	Polling Mode		280
20 Access-Layer Components:
Time Sync (IxTimeSyncAcc) API				283
20.1	What’s New			283
20.2	Introduction			283
	20.2.1 IEEE 1588 PTP Protocol Overview			284
	20.2.2 IEEE 1588 Hardware Assist Block			285
	20.2.3	IxTimeSyncAcc		288
	20.2.4 IEEE 1588 PTP Client Application			288
20.3	IxTimeSyncAcc API Details			288
	20.3.1	Features		288
	20.3.2	Dependencies		289
	20.3.3	Error Handling		289
April 2005		IXP400 Software Version 2.0	Programmer’s Guide
10		Document Number: 252539, Revision: 007