Intel IXP400 manual Parity Error Interrupt Deassertion Conditions Sheet 1

Intel® IXP400 Software

Access-Layer Components: Parity Error Notifier (IxParityENAcc) API

3.When a parity error occurs, the interrupt will fire and invoke the ISR of the IxParityENAcc component.

4.IxParityENAcc, in turn, invokes the client callback.

5.The client or data abort handler callback routine will then fetch the parity error context details and take appropriate action.

6.The client will then request to clear the interrupt condition.

The Parity Error Context will provide the following details:

•Source where the parity error detected

•Access type – Read/Write

•Faulty memory address

•Data from the faulty location if available

•Interface on which the request is made (AHB Bus or MPI)

•Master and Slave of the last erroneous AHB transaction

Table 47 describes the actions that should be taken when the client callback or data abort handler invokes the API to clear the parity interrupt conditions for the specified parity error context.

Table 47. Parity Error Interrupt Deassertion Conditions (Sheet 1 of 2)

Interrupt Bit	Source	API Invoked by...	Action Taken During Interrupt Clear
			Interrupt will be masked off at the
Int0	NPE-A		interrupt controller so that it will not
			trigger continuously.
Int1	NPE-B	Client callback	Client application has to take appropriate
Int2	NPE-C		action and needs to reconfigure the parity
			error detection subsequently so that it is
			notified of the interrupts.
			Interrupt condition is cleared at the PCI
Int8	PCI	Client Callback	bus controller for the following:
			- PCI Initiator
			- PCI Target
			Interrupt will be masked off at the
			interrupt controller so that it will not
Int58	SWCP	Client Callback	trigger continuously.
			Client application has to take appropriate
			action and needs to reconfigure the parity
			error detection subsequently so that it is
			notified of the interrupts.

April 2005	IXP400 Software Version 2.0	Programmer’s Guide
240	Document Number: 252539, Revision: 007