Intel® IXP400 Software

Access-Layer Components: DMA Access Driver (IxDmaAcc) API

Table 16. DMA Modes Supported for Addressing Mode of Fixed Source Address and Incremental Destination Address

Increment

Increment

 

 

 

 

Source

Destination

 

Transfer Mode

 

Address

Address

 

 

 

 

 

 

 

 

 

 

Transfer Width

Transfer Width

Copy Only

Copy and

Copy and

Copy and

Bytes

Source

Destination

Clear

Bytes Reverse

 

Swapping

 

 

 

 

 

 

 

 

 

 

 

8-bit

8-bit

Supported

Supported

Supported

Supported

 

 

 

 

 

 

8-bit

16-bit

Supported

Supported

Supported

Supported

 

 

 

 

 

 

8-bit

32-bit

Supported

Supported

Supported

Supported

 

 

 

 

 

 

8-bit

Burst

Supported

Supported

Supported

Supported

 

 

 

 

 

 

16-bit

8-bit

Supported

Supported

Supported

Supported

 

 

 

 

 

 

16-bit

16-bit

Supported

Supported

Supported

Supported

 

 

 

 

 

 

16-bit

32-bit

Supported

Supported

Supported

Supported

 

 

 

 

 

 

16-bit

Burst

Supported

Supported

Supported

Supported

 

 

 

 

 

 

32-bit

8-bit

Supported

Supported

Supported

Supported

 

 

 

 

 

 

32-bit

16-bit

Supported

Supported

Supported

Supported

 

 

 

 

 

 

32-bit

32-bit

Supported

Supported

Supported

Supported

 

 

 

 

 

 

32-bit

Burst

Supported

Supported

Supported

Supported

 

 

 

 

 

 

Burst

8-bit

Not Supported

Not Supported

Not Supported

Not Supported

 

 

 

 

 

 

Burst

16-bit

Not Supported

Not Supported

Not Supported

Not Supported

 

 

 

 

 

 

Burst

32-bit

Not Supported

Not Supported

Not Supported

Not Supported

 

 

 

 

 

 

Burst

Burst

Not Supported

Not Supported

Not Supported

Not Supported

 

 

 

 

 

 

8.8Data Flow

The purpose of the DMA access layer is to transfer DMA configuration information from its clients to the NPEs. It is a control component where the actual DMA data flow is transparent to the IxDmaAcc component.

8.9Control Flow

For a DMA transaction to start, the client must initialize the DMA access layer, write to the queue manager, and receive a status of the transaction.

The IxDmaAcc component simultaneously supports multiple services. Consequently, a new request may be submitted before the confirmation of a previous DMA request is received from the NPE. The DMA Access layer API, however, assumes that all requests originate from the same Intel XScale core task. The DMA request is queued in the AQM’s request queue and waits to be serviced by the DMA NPE.

Programmer’s Guide

IXP400 Software Version 2.0

April 2005

 

Document Number: 252539, Revision: 007

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Intel IXP400 manual Data Flow, Control Flow