Intel® IXP400 Software

Access-Layer Components: HSS-Access (IxHssAcc) API

IxHssAccTdmSlotUsage *tdmMap — A pointer to an array defining the HSS time-slot assignment types.

IxHssAccLastErrorCallback lastHssErrorCallback — Client callback to report the last error.

The parameter IxHssAccConfigParams has two structures of type IxHssAccPortConfig — one for HSS Tx and one for HSS Rx. These structures are used to choose:

Frame-synchronize the pulse type (Tx/Rx)

Determine how the frame sync pulse is to be used (Tx/Rx)

Frame-synchronize the clock edge type (Tx/Rx)

Determine the data clock edge type (Tx/Rx)

Determine the clock direction (Tx/Rx)

Determine whether or not to use the frame sync pulse (Tx/Rx)

Determine the data rate in relation to the clock (Tx/Rx)

Determine the data polarity type (Tx/Rx)

Determine the data endianness (Tx/Rx)

Determine the Tx pin open drain mode (Tx)

Determine the start of frame types (Tx/Rx)

Determine whether or not to drive the data pins (Tx)

Determine the how to drive the data pins for voice56k type (Tx)

Determine the how to drive the data pins for unassigned type (Tx)

Determine the how to drive the Fbit (Tx)

Set 56Kbps data endianness, when using the 56Kbps type (Tx)

Set 56Kbps data transmission type, when using the 56Kbps type (Tx)

Set the frame-pulse offset in bits w.r.t, for the first time slot (0-1,023) (Tx/Rx)

Determine the frame size in bits (1-1,024)

IxHssAccConfigParams also has the following parameters:

The number of channelized time slots (0 - 32)

The number of packetized clients (0 - 4)

The byte to be transmitted on channelized service, when there is no client data to Tx

The HSS coprocessor loop-back state

The data to be transmitted on packetized service, when there is no client data to Tx

The HSS clock speed

April 2005

IXP400 Software Version 2.0

Programmer’s Guide

198

Document Number: 252539, Revision: 007

 

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Intel IXP400 manual Document Number 252539, Revision