Intel IXP400 - page 286

Intel® IXP400 Software
Access-Layer Components: Time Sync (IxTimeSyncAcc) API
April 2005 IXP400 Software Version 2.0 Programmer’s Guide
286 Document Number: 252539, Revision: 007
Figure 96 shows the location of the IEEE 1588 Hardware Assist block and its main interconnects to
other components in the IXP46X network processors.
Detailed Information
The IEEE 1588 Hardware Assist block implements a 64-bit register to keep track of the system
time, which is used to provide timestamp references for PTP messages. The register is incremented
based on a frequency scaling value, as supplied by the client application. The frequency scaling
value is accumulated on every clock cycle in the system into a 32-bit register, and an overflow
condition will cause the system time to increment. Thus, the slave will make use of the system time
to synchronize with that of the master by adjusting the frequency scaling value based on the
difference between the local system time and the master system time.
The IEEE 1588 Hardware Assist block also implements a mechanism whereby the system timer
can be verified against a predefined target time for equals or exceeds conditions. Upon these
conditions, the hardware block can interrupt the Intel XScale core, unless the interrupt is masked
off. If the interrupt is masked off, the said condition is flagged. This interrupt or event may be used
by client applications to update the frequency scaling and/or to set new system time and target time
values. However, it is not mandatory to make use of this hardware feature to enable timestamping.
A timestamp may be generated for each of the channels (i.e., on both incoming and outgoing MII
ports of an NPE) whenever the Sync and Delay_Req messages are detected (i.e., sent or received).
These timestamps are captured into respective transmit or receive snapshot registers.
Corresponding event flags are set and will be locked unless no errors are encountered. They can be
reset by clearing their corresponding events.
Figure 96. Block Diagram of Intel® IXP46X Network Processor
B4395-01
Intel
Xscale®
Core
AHB/AHB
Bridge
DDR Memory
Controller
PCI
Controller
Expansion
Bus Controller
NPE C
NPE B
NPE A
Queue
Manager
AHB/APB
Bridge
UART
UART
PMU
Timer
Interrupt
Ctrl
USB
Contr oller
GPIO
MII
MII
MII
DMA
Engine
IEEE 1588
Auxiliary Master
Snapshot
Auxiliary Slave
Snapshot