Intel IXP400 manual Access-Layer Components Ethernet PHY IxEthMii API, Supported PHYs

	Intel® IXP400 Software
Access-Layer Components:	11
Ethernet PHY (IxEthMii) API

This chapter describes the Intel® IXP400 Software v2.0’s “Ethernet PHY API” access-layer component.

11.1What’s New

The following changes or enhancements where made to this component in software release 2.0.

•This component has been updated to support the Intel® LXT9785HC 10/100 Ethernet Octal PHY that is on the Intel® IXDP465 Development Platform.

11.2Overview

IxEthMii is used primarily to manipulate a minimum number of necessary configuration registers on Ethernet PHYs supported on the Intel® IXDP425 / IXCDP1100 Development Platform and Intel® IXDP465 Development Platform without the support of a third-party operating system. Codelets and software used for Intel internal validation are the consumers of this API, although it is provided as part of the IXP400 software for public use.

11.3Features

The IxEthMii components provide the following features:

•Scan the MDIO bus for up to 32 available PHYs

•Configure a PHY link speed, duplex, and auto-negotiate settings

•Enable or disable loopback on the PHY

•Reset the PHY

•Gather and/or display PHY status and link state

11.4Supported PHYs

The supported PHYs are listed in the table below. IxEthMii interacts with the MII interfaces for the PHY’s connected to the NPEs on the IXDP425 / IXCDP1100 platform. These functions do not support reading PHY registers of devices connected on the PCI interface. Other Ethernet PHYs are also known to use the same register definitions but are unsupported by this software release (e.g. Intel® 82559 10/100 Mbps Fast Ethernet Controller).

Register definitions are located in the following path:

Programmer’s Guide	IXP400 Software Version 2.0	April 2005
	Document Number: 252539, Revision: 007	181