Table 46. Parity Capabilities Supported by IxParityENAcc
The parity error access component provides the following features:

Intel® IXP400 Software

Access-Layer Components: Parity Error Notifier (IxParityENAcc) API

16.3IxParityENAcc API Details

16.3.1Features

Interface to the client application to register a call back handler for application-specific processing with respect to the source of failure in the notification.

Interface to the client application to individually enable and disable parity detection in the following hardware blocks, which are capable of generating parity errors. This interface can be invoked multiple times either to enable/disable or query parity error detection capabilities.

Instruction and Data Memory of the Network Processing Engines (NPEs)

Switching coprocessor in NPE B (SWCP)

AHB Queue Manager’s SRAM (AQM)

PCI Controller

Expansion Bus Controller

DDR SDRAM Memory Controller Unit (MCU).

Interface to query the parity error detection status (whether enabled or not) on each of the above components.

Interface to get the parity error detection statistics for each of the above-mentioned components.

Interface exchanges the data structures defined in the host byte order with the client application. This module operates in both big endian and little endian mode.

Feature

Hardware Component

Software Support

Recoverable

 

 

 

 

Error Correction Code

Memory Controller Unit - SDRAM

Single Bit Parity Error Notification

Yes

 

 

Multi-Bit Parity Error Notification

No

 

 

 

 

 

 

Parity Error Detection

AHB Queue Manager SRAM

Parity Error Notification

No

 

 

 

 

 

NPE IMEM, DMEM, AHB

 

 

Parity Error Detection

Coprocessor, Switch

Parity Error Notification

No

 

Coprocessor

 

 

 

 

 

 

Parity Error Detection

Switch Coprocessor

Parity Error Notification

No

 

 

 

 

Parity Error Detection

PCI Controller

Parity Error Notification

No

 

 

 

 

Parity Error Detection

Expansion Bus Controller

Parity Error Notification

No

 

 

 

 

16.3.2Dependencies

The client application at the time of initialization registers the parity error handler callback with IxParityENAcc. The client application also makes use of the parity error detection API to enable the underlying hardware blocks for parity error detection.

Programmer’s Guide

IXP400 Software Version 2.0

April 2005

 

Document Number: 252539, Revision: 007

237

Page 237
Image 237
Intel IXP400 manual IxParityENAcc API Details, Features, Feature Hardware Component Software Support Recoverable