Intel IXP400 manual Ixstaticmap

Intel® IXP400 Software

Operating System Abstraction Layer (OSAL)

{	/* type	*/
IX_STATIC_MAP,
IXP123_PCI_CFG_BASE_PHYS,	/* physicalAddress	*/
IXP123_PCI_CFG_REGION_SIZE,	/* size	*/
IXP123_PCI_CFG_BASE_VIRT,	/* virtualAddress	*/
NULL,	/* mapFunction	*/
NULL,	/* unmapFunction	*/
0,	/* refCount	*/
IX_OSAL_BE,	/* coherency	*/
"pciConfig"	/* name	*/
},
#elif defined IX_OSAL_VXWORKS

/* Global 1:1 big endian and little endian, address coherent map

*/
{	/* type	*/
IX_STATIC_MAP,
0x00000000,	/* physicalAddress	*/
0xFFFFFFFF,	/* size	*/
0x00000000,	/* virtualAddress	*/
NULL,	/* mapFunction	*/
NULL,	/* unmapFunction	*/
0,	/* refCount	*/
IX_OSAL_BE IX_OSAL_LE_AC,	/* coherency	*/
"global"	/* name	*/
}
#endif
}

Note: “” stands for “or”.

Note: The definition of the memory map is very flexible in terms of what operating systems and endianness modes can share memory map cells. Typically, an OS would use only one memory map and share the same cells for big endian and little endian access types. This is exemplified above by setting the access coherency to composite types such as “IX_OSAL_BE or IX_OSAL_LE_AC”, which means the cell can be used for big endian and little endian/address coherent access. It is, however, not possible to share a cell between both little endian address coherent and data coherent, as these are fundamentally conflicting modes of operation.

April 2005	IXP400 Software Version 2.0	Programmer’s Guide
326	Document Number: 252539, Revision: 007