Intel® IXP400 Software

Access-Layer Components: Parity Error Notifier (IxParityENAcc) API

IxParityENAcc depends on various hardware registers to fetch the parity error information upon receiving an interrupt due to parity error. It then notifies the client application through the means of the callback handler with parity error context information.

IxParityENAcc also makes use of IxOSAL to access the underlying Operating System features such as IRQ registration, locks, and register access. IxOSAL is an abstracted interface, which is portable across different underlying OS.

Please note that the client application may have dependencies on other access components when attempting to resolve the parity error issues. Indirect dependencies are not captured here.

Figure 75 presents a IxParityENAcc Dependency diagram.

Figure 75. IxParityENAcc Dependency Diagram

 

Client

 

 

 

Application

 

Access-Layer Interface

 

 

 

Parity Error Notifier Access Component

 

Parity Error

 

Parity Error

IxFeatureCtrlAcc

Notification

 

Configuration

 

 

 

IxOSAL

 

 

Hardware Interface

 

 

 

 

Interrupt

 

 

 

Controller

 

 

NPE A

 

DDR MCU

Expansion

 

Bus Ctrl

SWCP

 

 

 

PCI Bus

 

NPE B

AQM

 

 

Controller

 

 

 

 

NPE C

 

 

 

 

 

 

B4383-01

16.4IxParityENAcc API Usage Scenarios

The following scenarios present usage examples of the interface by a client application.

There are three general tasks that would normally be provided by a client application with respect to parity events:

Parity Error Notification

April 2005

IXP400 Software Version 2.0

Programmer’s Guide

238

Document Number: 252539, Revision: 007

 

Page 238
Image 238
Intel IXP400 manual IxParityENAcc API Usage Scenarios, IxParityENAcc Dependency Diagram