USB Port | USB Port | Diagnostic LEDs | |
Back edge of server board |
|
| |
|
| MSB | LSB |
Figure 96. Diagnostic LED Placement Diagram
Table 12. Diagnostic LED POST Code Decoder
Checkpoint | Diagnostic LED Decoder | Description | |||
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|
| |||
| G=Green, R=Red, A=Amber |
| |||
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|
|
| MSB |
|
| LSB |
|
|
|
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|
|
|
Host Processor |
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|
|
| |
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|
|
|
|
|
0x10h | OFF | OFF | OFF | R | |
|
|
|
|
| (bootstrap processor) |
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|
|
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|
|
0x11h | OFF | OFF | OFF | A | Host processor cache initialization (including AP) |
|
|
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|
0x12h | OFF | OFF | G | R | Starting application processor initialization |
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|
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|
0x13h | OFF | OFF | G | A | SMM initialization |
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|
|
|
|
|
Chipset |
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|
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|
|
|
|
|
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|
0x21h | OFF | OFF | R | G | Initializing a chipset component |
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|
|
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|
|
Memory |
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|
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|
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|
|
|
|
|
|
0x22h | OFF | OFF | A | OFF | Reading configuration data from memory (SPD |
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|
|
|
| on DIMM) |
|
|
|
|
|
|
0x23h | OFF | OFF | A | G | Detecting presence of memory |
|
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|
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|
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0x24h | OFF | G | R | OFF | Programming timing parameters in the memory |
|
|
|
|
| controller |
|
|
|
|
|
|
0x25h | OFF | G | R | G | Configuring memory parameters in the memory |
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|
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|
| controller |
|
|
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|
|
0x26h | OFF | G | A | OFF | Optimizing memory controller settings |
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|
|
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|
|
0x27h | OFF | G | A | G | Initializing memory, such as ECC init |
|
|
|
|
|
|
0x28h | G | OFF | R | OFF | Testing memory |
|
|
|
|
|
|
128 | Intel® Server System SR2500AL User’s Guide |
