Jameco Electronics 2000, 3000 Serial Port Register Layout, Signals Shown at Microprocessor Tx Pin

12.1 Serial Port Register Layout

Figure 12-2shows a functional block diagram of a serial port. Each serial port has a data register, a control register and a status register. Writing to the data register starts transmis- sion. The least significant bit (LSB) is always transmitted first. This is true for both asyc- nchronous and synchronous communication. If the write is performed to an alternate data register address, the extra address bit or 9th bit (8th bit if 7 data bits) is sent. When data bits have been received, they are read from the data register (LSB first). The control regis- ter is used to set the transmit and receive parameters. The status register may be tested to check on the operation of the serial port.

											long stop register
	Read Data						Write Data
Data In Reg							Data Out Reg				9th bit	9th bit
											zero	one
fifo ports E, F only											alternate data out
						fifo ports E, F only					registers
(4-bytes deep)
							(4-bytes deep)
											address register
Input Shift Reg							output shift
							reg
Rx serial data in											Tx serial data out
LSB First
												LSB First
Bit	0	1	2	3	4	5	6	7	stop
Tx										Transmitting 0x0D6
Start Bit	0	1	1	0	1	0	1	1		Stop Bit
Bit 0		1	2	3	4	5	6	7	A	stop	Transmitting 0x0D6
Tx
											with 9th bit zero
Start Bit	0	1	1	0	1	0	1	1
							9th bit			Stop Bit
Signals Shown at Microprocessor Tx Pin

Figure 12-2. Functional Block Diagram of a Serial Port

164 Rabbit 3000 Microprocessor