Jameco Electronics 3000, 2000 manual Short Chip Select Timing for Writes, Address = 0x000D

B.1.12 Short Chip Select Timing for Writes

The Rabbit 3000 provided the ability to produce shorter chip select strobes for reads when in a reduced-speed mode. A new feature has been added to produce short chip select strobes for writes as well, and can be controlled by the GPCSR register.

The new control bit for the short chip selects are listed in Table B-22.

NOTE: Bit 3 was always written with zero in the original Rabbit 3000 chip.

Table B-22. Global Power Save Control Register

Global Power Save Control Register			(GPSCR)	(Address = 0x000D)
Bit(s)	Value		Description
7:5	000	Self-timed chip selects are disabled.
	001	This bit combination is reserved and should not be used.
	010	This bit combination is reserved and should not be used.
	011	This bit combination is reserved and should not be used.
	100	296 ns self-timed chip selects (192 ns best case, 457 ns worst case).
	101	234 ns self-timed chip selects (151 ns best case, 360 ns worst case).
	110	171 ns self-timed chip selects (111 ns best case, 264 ns worst case).
	111	109 ns self-timed chip selects (71 ns best case, 168 ns worst case).
4	0	Normal Chip Select timing for read cycles.
	1	Short Chip Select timing for read cycles (not available in full speed).
3	0	Normal Chip Select timing for write cycles
	1	Short Chip Select timing for write cycles (not available in full speed).
2:0	000	The 32 kHz clock divider is disabled.
	001	This bit combination is reserved and should not be used.
	010	This bit combination is reserved and should not be used.
	011	This bit combination is reserved and should not be used.
	100	32 kHz oscillator divided by two (16.384 kHz).
	101	32 kHz oscillator divided by four (8.192 kHz).
	110	32 kHz oscillator divided by eight (4.096 kHz).
	111	32 kHz oscillator divided by sixteen (2.048 kHz).

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