Jameco Electronics 3000, 2000 manual Combined I & D

Models: 3000 2000

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Combined I & D

are mapped into contiguous regions of memory to create a continuous root code segment starting at the bottom of physical memory in flash. In the I space the division between the root segment and the data segment is irrelevant because the DATASEG register contains zero and the division between the segments defined by the lower 4 bits of the SEGSIZE register does not mark a division in physical memory for code space. However, if for D space accesses A16 is inverted for the root segment and A19 is inverted for the data seg- ment, then root segment data is mapped to the next 64k of flash and data segment data is mapped to a place in memory 512K higher in the RAM. This divides the data space into two separate segments for constants and variables. If the stack segment (which is still combined I and D space) and the extended code segment (also combined I and D space) occupy 12K at the top of the 64K space, then the remaining 52K is doubled into a 52K code space in flash and a 52K data space, which may be split into two parts, one for con- stants and one for variables. The relative size of the two parts depends on the lower 4 bits of the SEGSIZE register, which define the 4K page boundary between the root segment and the data segment.

 

Combined I & D

64k

 

 

Extended Code

 

 

 

52k

 

 

Stack

 

 

 

RAM

 

 

 

 

 

 

 

 

 

Root

(4*n)k

 

 

Code &

 

 

 

Data

 

 

 

(flash)

 

 

 

 

 

Separate I & D

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

D-Space

 

Allocate

 

 

 

 

 

 

 

 

 

 

 

 

Root

 

Var

 

 

 

 

vars

 

 

 

 

 

(RAM)

 

 

Code

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I-

Space

 

D-Space

 

Allocate

 

 

 

 

 

 

 

 

 

 

Const

 

 

 

 

 

 

 

 

 

 

 

 

consts

 

 

 

 

 

 

 

 

 

 

(flash)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 8-5. Combined versus Separate I & D Space

The use of physical memory that goes with this map is shown in Figure 8-6, “Use of Phys- ical Memory Separate I & D Space Model,” on page 126. In this figure "n" is the number of 4k pages devoted to D space constants. In the figure it is assumed that the lower 512k of memory is entirely composed of flash memory and the upper 512K is entirely RAM. This does not have to be the case. For example, if a low-cost 32K x 8 RAM is used and mapped to the 3rd quadrant using /CS1, the RAM memory will begin at 512K and will be repeated 8 times in the 3rd quadrant from addresses 512K to 768K. Since the memory repeats, it can be considered to start at any address and continue for 32K. At least 4K of RAM is needed for the stack segment, so if a 32K RAM is used, a maximum of 28K would be available for storing data variables. If more stack segments are needed, the amount of data variable space would be corresponding reduced.

User’s Manual

125

Page 134
Image 134
Jameco Electronics 3000, 2000 manual Combined I & D