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User’s Manual
Rabbit 3000 Microprocessor
Rabbit 3000 Microprocessor User’s Manual
Trademarks
Rabbit Semiconductor
Chapter 1. Introduction
TABLE OF CONTENTS
Chapter 2. Rabbit 3000 Design Features
Chapter 4. Rabbit Capabilities
Parallel Ports
Chapter 14. Rabbit 3000 Clocks
Appendix A. The Rabbit Programming Port
Rabbit 3000 Microprocessor
User’s Manual
1. INTRODUCTION
Rabbit 3000 Microprocessor
1.1 Features and Specifications Rabbit
User’s Manual
•There is a built-inwatchdog timer
User’s Manual
Figure 1-1.Rabbit 3000 Block Diagram
1.2 Summary of Rabbit 3000 Advantages
Rabbit
1.3 Differences Rabbit 3000 vs. Rabbit
Feature
Rabbit
Serial ports with support for SDLC/HDLC IrDA
Feature
Rabbit
Rabbit
User’s Manual
2.RABBIT 3000 DESIGN FEATURES
Rabbit 3000 Microprocessor
2.2.2 Serial Ports
2.2 Overview of On-ChipPeripherals and Features
2.2.1 5 V Tolerant Inputs
Rabbit 3000 Microprocessor
2.2.3 System Clock
2.2.4 32.768 kHz Oscillator Input
Filtered Input
2.2.5 Parallel I/O
Figure 2-2.Digital Filtering Input Pins
External Input
Rabbit
2.2.6 Slave Port
2.2.7 Auxiliary I/O Bus
2.2.8 Timers
Figure 2-4.Rabbit Timers A and B
2.2.9 Input Capture Channels
User’s Manual
2.2.10 Quadrature Encoder Inputs
2.2.11 Pulse Width Modulation Outputs
2.3.1 Programming Port
2.2.13 Separate Core and I/O Power Pins
2.3 Design Standards
2.2.12 Spread Spectrum Clock
2.4 Dynamic C Support for the Rabbit
2.3.2 Standard BIOS
Rabbit 3000 Microprocessor
3.1Processor Registers
3.DETAILS ON RABBIT MICROPROCESSOR FEATURES
Rabbit 3000 Microprocessor
3.2 Memory Mapping
Figure 3-3.Example of Memory Mapping Operation
Figure 3-4 shows a memory interface unit
Rabbit 3000 Microprocessor
3.2.1 Extended Code Space
long jump in code
Compiler notices that
Compiler inserts
code has passed F000
xpc window stack
3.2.3 Using the Stack Segment for Data Storage
Data RAM Root Code
3.2.4 Practical Memory Considerations
Data RAM Root Code
User’s Manual
3.3 Instruction Set Outline
User’s Manual
3.3.1 Load Immediate Data to a Register
3.3.3 Load or Store Data Using an Index Register
User’s Manual
3.3.4 Register-to-RegisterMove
3.3.5 Register Exchanges
3.3.7 16-bitArithmetic and Logical Ops
3.3.6 Push and Pop Instructions
User’s Manual
extend sign of l to HL
User’s Manual
3.3.8 Input/Output Instructions
3.4.3 Manipulation of Boolean Variables
3.4.1 Zero HL in 4 Clocks
3.4.2Exchanges Not Directly Implemented
User’s Manual
3.4.4 Comparisons of Integers
test for
3.4.5 Atomic Moves from Memory to I/O Space
3.5.1 Interrupt Priority
3.5 Interrupt Structure
Effect on Interrupts
IPSET 1, IPSET 2, IPSET
Processor
Priority
LD SP,HL IOI LD sseg,a
3.5.2 Multiple External Interrupting Devices
LD SP,HL LD SP,IY LD SP,IX
3.5.4 Critical Sections
3.5.5 Semaphores Using Bit B,HL
3.5.6 Computed Long Calls and Jumps
4.1 Precisely Timed Output Pulses
4.RABBIT CAPABILITIES
Rabbit 2000 Microprocessor
4.2 Open-DrainOutputs Used for Key Scan
Rabbit 2000 Microprocessor
4.3 Cold Boot
User’s Manual
4.4 The Slave Port
Rabbit 2000 Microprocessor
4.4.1 Slave Rabbit As A Protocol UART
User’s Manual
5.PIN ASSIGNMENTS AND FUNCTIONS
Rabbit 3000 Microprocessor
5.1 LQFP Package
5.1.1 Pinout
14.00 ± 0.10 mm
5.1.2 Mechanical Dimensions and Land Pattern
16.00 ± 0.25 mm
14.00 ± 0.10 mm
Side Fillet
TOLERANCE AND SOLDER JOINT ANALYSIS
Toe Fillet
Heel Fillet
User’s Manual
5.2 Ball Grid Array Package
5.2.1 Pinout
A B C D E F G H J K L M
Table 5-3.Design Considerations
5.2.2 Mechanical Dimensions and Land Pattern
Table 5-2.Ball and Land Size Dimensions
all dimensions in mm
BOTTOM VIEW
Figure 5-5.BGA Package Outline
User’s Manual
TOP VIEW
Table 5-1.Rabbit Pin Descriptions
5.3 Rabbit Pin Descriptions
Table 5-1.Rabbit Pin Descriptions continued
Figure 5-6.Bus Timing Read and Write
5.4 Bus Timing
Table 5-2.Pins With Alternate Functions
5.5 Description of Pins with Alternate Functions
Table 5-2.Pins With Alternate Functions continued
Table 5-3.Parallel Port x Alternate Functions
Table 5-5.Rabbit 3000 Absolute Maximum Ratings
5.6 DC Characteristics
Table 5-6.3.3 Volt DC Characteristics
User’s Manual
5.7 I/O Buffer Sourcing and Sinking Limit
Rabbit 3000 Microprocessor
User’s Manual
6.RABBIT INTERNAL I/O REGISTERS
ISR Starting Address
On-ChipPeripheral
Mnemonic
Reset
Table 6-2.Rabbit Internal I/O Registers
Register Name
Table 6-2.Rabbit Internal I/O Registers continued
Port E Bit 7 Register
Table 6-2.Rabbit Internal I/O Registers continued
PWM MSB 0 Register
Table 6-2.Rabbit Internal I/O Registers continued
Table 6-2.Rabbit Internal I/O Registers continued
Timer A Time Constant 5 Register
Serial Port D Address Register
Table 6-2.Rabbit Internal I/O Registers continued
7.1Processor Identification
7.MISCELLANEOUS FUNCTIONS
Main Clock
7.2 Rabbit Oscillators and Clocks
32.768 kHz Clock
Rabbit
Table 7-6.Clock Select Field of GCSR
Table 7-5.Global Control/Status Register
Table 7-7.Global Clock Double Register
7.3 Clock Doubler
Oscillator Oscillator delayed and inverted
User’s Manual
7.4 Clock Spectrum Spreader
User’s Manual
7.5 Chip Select Options for Low Power
Bits
Global Power Save Control Register
GPSCR
Address = 0x0D
Valid
Figure 7-4.Short Chip Select Memory Read
32 kHz
ADDR
7.6 Output Pins CLK, STATUS, /WDTOUT, /BUFEN
User’s Manual
7.7 Time/Date Clock Real-TimeClock
Table 7-10. Real-TimeClock RTCxR Data Registers
7.8 Watchdog Timer
0x51
User’s Manual
7.9 System Reset
Direction
RESET Low
Post-Reset†
Pin Name
7.10 Rabbit Interrupt Structure
Action Required to Clear the Interrupt
Priority
Interrupt Source
7.10.1 External Interrupts
Bits 5,4
Reg Name
Reg Address
Bits 7,6
User’s Manual
7.11 Bootstrap Operation
Rabbit 3000 Microprocessor
7.12 Pulse Width Modulator
Table 7-18.PWM MSB x Register
Table 7-17.PWM LSB x Register
Interrupt
7.13 Input Capture
Timer A8
CPT input
Rabbit 3000 Microprocessor
Address =
Table 7-19.Input Capture Control/Status Register
Input Capture Control/Status Register
ICCSR
Table 7-21.Input Capture Trigger x Register
Table 7-20.Input Capture Control Register
Table 7-24.Input Capture MSB x Register
Table 7-22.Input Capture Source x Register
Table 7-23.Input Capture LSB x Register
Counter 00
7.14 Quadrature Decoder
I input
Q input
User’s Manual
Rejected
Accepted
Bits
Quad Decode Control/Status Register
QDCSR
Address =
Table 7-27.Quadrature Decoder Count Register
Table 7-26.Quadrature Decoder Control Register
Rabbit 3000 Microprocessor
8.1Interface for Static Memory Chips
8.MEMORY INTERFACE AND MAPPING
Figure 8-2.Typical Memory Chip Connection
Rabbit
Memory Mapping Unit
8.2 Memory Mapping Overview
8.3 Memory-MappingUnit
Processor
Page
User’s Manual
8.4 Memory Interface Unit
8.5 Memory Bank Control Registers
Address =
Table 8-4.MMU Instruction/Data Register MMIDR =
MMU Instruction/Data Register
MMIDR
Table 8-5.MMU Expanded Code Register MECR =
Address = 0x01C
8.6 Allocation of Extended Code and Data
Breakpoint/Debug Control Register
BDCR
Bits 7:5
8.7 Instruction and Data Space Support
Combined I & D
64k+4*n
User’s Manual
8.8 How the Compiler Compiles to Memory
Rabbit 3000 Microprocessor
9. PARALLEL PORTS
9.1 Parallel Port A
9.2 Parallel Port B
Table 9-6.Parallel Port C Register Bit Functions
9.3 Parallel Port C
Table 9-5.Parallel Port C Registers
Table 9-7.Parallel Port D Registers
9.4 Parallel Port D
I/O Data
perclk/2 Timer A1 Timer B1 Timer B2
PD3 PD0 perclk/2 Timer A1 Timer B1 Timer B2
Figure 9-1.Parallel Port D Block Diagram
Table 9-9.Parallel Port D Control Register adr =
Table 9-8.Parallel Port D Register functions
•PDDR—ParallelPort D data register. Read/Write
9.5 Parallel Port E
Rabbit 3000 Microprocessor
Table 9-10.Parallel Port E Registers
Table 9-12.Parallel Port E Control Register adr =
Table 9-11.Parallel Port E Register functions
Table 9-14.Parallel Port F Register Functions
9.6 Parallel Port F
Table 9-13.Parallel Port F Registers
User’s Manual
9.6.1 Using Parallel Port A and Parallel Port F
• Parallel Inputs, PWM, Serial Port Clocks
• Parallel Inputs
• Full Functionality
• Parallel Outputs
Table 9-16.Parallel Port G Registers
9.7 Parallel Port G
Rabbit 3000 Microprocessor
Table
Parallel Port G Control Register adr= 0x04C
read data read strobe chip select strobe
10.I/O BANK CONTROL REGISTERS
ADDR write data write strobe
T1 Tw T2
Table 10-1.I/O Bank x Control Register
I/O Address
Control Register
Port E
I/O Address
Rabbit 3000 Microprocessor
Figure 11-1.Block Diagram of Timers A and B
11. TIMERS
11.1 Timer A
11.1.1 Timer A I/O Registers
Table
Timer A Capabilities
Table 11-3.Timer A Control and Status Register
A4 interrupt disabled
Table 11-5.Timer A Prescale Register
Table 11-4.Timer A Control Register
User’s Manual
11.1.2 Practical Use of Timer A
11.2 Timer B
Table 11-8.Timer B Control Register
Table 11-7.Timer B Control and Status Register
Table 11-12.Timer B Count LSB Register
Table 11-9.Timer B Count MSB x Registers
Table 11-10.Timer B Count LSB x Registers
Table 11-11.Timer B Count MSB Register
11.2.1 Using Timer B
Rabbit 3000 Microprocessor
Table 12-1.Serial Port Signals
12.RABBIT SERIAL PORTS
CLKA Timer A4 Serial Port A TXA
User’s Manual
12.1 Serial Port Register Layout
User’s Manual
Table 12-4.Serial Port C Registers
12.2 Serial Port Registers
Table 12-2.Serial Port A Registers
Table 12-3.Serial Port B Registers
Table 12-7.Serial Port F Registers
Table 12-5.Serial Port D Registers
Table 12-6.Serial Port E Registers
Table 12-9.Address Register All Ports
Table 12-8.Data Register All Ports
Table 12-10.Long Stop Register All Ports
Serial Port x Status Register
Serial Port x Status Register
Address = 0xCB
Description HDLC mode only
Serial Port x Status Register
SESR
SBCR
Serial Port x Control Register
SACR
Address = 0xC4
SDCR
Serial Port x Control Register
SCCR
Address = 0xE4
SFCR
Serial Port x Control Register
SECR
Address = 0xCC
Serial Port x Extended Register
Normal clocked serial operation
Normal HDLC data encoding
Request Interrupt
12.3 Serial Port Interrupt
Transmitter IRQ
Rabbit 3000 Microprocessor
12.4 Transmit Serial Data Timing
12.5 Receive Serial Data Timing
12.6 Clocked Serial Ports
User’s Manual
Rabbit 3000 Microprocessor
12.7.2 Clocked Serial Timing with External Clock
12.7 Clocked Serial Timing
12.7.1 Clocked Serial Timing With Internal Clock
Rabbit 3000 Microprocessor
perclk
CLKA
Valid
User’s Manual
12.8 Synchronous Communications on Ports E and F
Valid Data Hits
Last Byte Bit Pattern
User’s Manual
Rabbit 3000 Microprocessor
User’s Manual
12.9 Serial Port Software Suggestions
User’s Manual
12.9.1 Controlling an RS-485Driver and Receiver
12.9.2 Transmitting Dummy Characters
12.9.3 Transmitting and Detecting a Break
stop bit 7
Rabbit 3000 Microprocessor
12.9.8 Supporting 9th Bit Communication Protocols
12.9.9 Rabbit-OnlyMaster/Slave Protocol
12.9.10 Data Framing/Modbus
User’s Manual
Rabbit 3000 Microprocessor
SD0-SD7
13.RABBIT SLAVE PORT
SRD SD7:0
Slave Port Read Cycle
Slave Port Write Cycle
SA1, SA0
Maximum
Symbol
Parameter
Minimum
Master writes SPD0R
D0–D7
Reset
Master Rabbit
First Slave Rabbit
Table 13-1.Slave Port Registers
13.2 Slave Port Registers
The functionality of the bits is as follows
Table 13-3.Slave Port Status Register SPSR adr =
13.3.1 Slave Applications
User’s Manual
13.3.2 Master-SlaveMessaging Protocol
Rabbit 3000 Microprocessor
Figure 14-1.Rabbit 3000 Main Oscillator Circuit
14.RABBIT 3000 CLOCKS
Rabbit 3000 Microprocessor
14.1 Low-PowerDesign
User’s Manual
15. EMI CONTROL
15.2 Using the Clock Spectrum Spreader
15.1 Power Supply Connections and Board Layout
Table 15-2.Spread Spectrum Mode Select
Rabbit 3000 Microprocessor
16.1 Memory Access Time
16.AC TIMING SPECIFICATIONS
delay
Tsetup
CSx WEx D7:0
CLK A19:0
D7:0
•T = -40Cto 85C, V = 3.3
CLK A19:0
D7:0
CLK A19:0 CSx WEx D7:0
Tsetup
Example
Max. delay @ 1.8 V = 12.2 + 2.7n -
Min. delay @ 3.3 V = 3.7 + 0.75n -
Max. delay @ 2.5 V = 7.6 + 1.67n -
Min. delay @ 2.5 V = 4.7 + 1.03n -
•Clock = 29.49 MHz •T = 34 ns
Example
IORD
16.2 I/O Access Time
CLK A15:0
IOCSx
The following I/O read time delays were measured
User’s Manual
16.3 Further Discussion of Bus and Clock Timing
Oscillator Oscillator delayed and inverted
16.4 Maximum Clock Speeds
Figure 16-8.External Oscillator Buffer
+3.3 XTALA1
User’s Manual
16.5 Power and Current Consumption
enlarged view over 0–16MHz range
32MHz and 1.4 µA at 2 kHz
Rabbit 3000 Microprocessor
16.6 Current Consumption Mechanisms
Itotal µA = 0.32 × V × f + 0.23 × Vc × f + 5 × Vc
16.7 Sleepy Mode Current Consumption
16.8 Memory Current Consumption
16.9 Battery-BackedClock Current Consumption
Design Recommendations
16.10 Reduced-PowerExternal Main Oscillator
17.1.1 BIOS Services
17.RABBIT BIOS AND VIRTUAL DRIVER
17.1 The BIOS
17.2.1 Periodic Interrupt
17.1.2 BIOS Assumptions
17.2.2 Watchdog Timer Support
17.2 Virtual Driver
User’s Manual
Rabbit 3000 Microprocessor
18.OTHER RABBIT SOFTWARE
18.1Power Management Support
18.2 Reading and Writing I/O Registers
18.2.1 Using Assembly Language
18.2.2 Using Library Functions
18.3.2 Interrupt While Updating Registers
18.3 Shadow Registers
18.3.1 Updating Shadow Registers
18.3.2.2 Non-atomicInstructions
18.4 Timer and Clock Usage
The format of the structure used is the following
Rabbit 3000 Microprocessor
Summary
19.RABBIT INSTRUCTIONS
Flag Register Key
Spreadsheet Conventions
ALTD “A” Column Symbol Key
IOI and IOE “I” Column Symbol Key
Meaning
Symbols
Rabbit
Z180
19.4 16-bitIndexed Loads and Stores
19.1 Load Immediate Data
19.2 Load & Store to Immediate Address
19.3 8-bitIndexed Load and Store
User’s Manual
19.5 16-bitLoad and Store 20-bitAddress
19.6 Register to Register Moves
19.9 16-bitArithmetic and Logical Ops
19.7 Exchange Instructions
19.8 Stack Manipulation Instructions
User’s Manual
19.10 8-bitArithmetic and Logical Ops
19.12 8-bitIncrement and Decrement
19.118-bitBit Set, Reset and Test
User’s Manual
19.13 8-bitFast A Register Operations
19.14 8-bitShifts and Rotates
19.16 Block Move Instructions
19.15 Instruction Prefixes
User’s Manual
19.17 Control Instructions - Jumps and Calls
19.18 Miscellaneous Instructions
19.19 Privileged Instructions
20.DIFFERENCES RABBIT VS. Z80/Z180 INSTRUCTIONS
Rabbit Instructions to Use
Z80/Z180 Instructions Dropped
Flag Register Key
ALTD “A” Column Symbol Key
IOI and IOE “I” Column Symbol Key
Spreadsheet Conventions
Bit select
Symbols
Instruction
Instruction
Instruction
Instruction
Instruction
Rabbit 3000 Microprocessor
PROGRAMMING PORT PIN ASSIGNMENTS
APPENDIX A. THE RABBIT PROGRAMMING PORT
Rabbit LQFP pins are shown in parenthesis
Rabbit 3000 Microprocessor
A.2 Alternate Programming Port
•doubler in use 52/48 duty cycle, and
A.3 Suggested Rabbit Crystal Frequencies
•spectrum spreader set to normal
Table A-1.Preliminary Crystal Frequencies
Memory Access Times, and Baud Rates
User’s Manual
APPENDIX B. RABBIT 3000 REVISIONS
Rabbit 3000 Microprocessor
User’s Manual
Description
B.1 Discussion of Fixes and Improvements
Rabbit
Rabbit
Mnemonic
B.1.1 Rabbit Internal I/O Registers
Reset
Register Name
External Interrupt User Enable Register
Global Power Save Control Register
Table B-4.Rabbit 3000 I/O Address Ranges
B.1.2 Peripheral and ISR Address
and Interrupt Service Vectors
Table B-4.Rabbit 3000 I/O Address Ranges
and Interrupt Service Vectors continued continued
GCPU
B.1.3 Revision-LevelID Register
Processor Revision
Package
User’s Manual
B.1.4 System/User Mode
B.1.5 Memory Protection
Address =
Table B-7.Write Protect Low Register
Write Protect Low Register
WPLR
Table B-9.Write Protect Segment x Register
Table B-8.Write Protect High Register
Address =
Table B-10.Write Protect Segment x Low Register
Write Protect Segment x Low Register
WPSALR
Address =
Table B-11.Write Protect Segment x High Register
Write Protect Segment x High Register
WPSAHR
B.1.6 Stack Protection
Table B-14.Stack High Limit Register
Table B-12.Stack Limit Control Register
Table B-13.Stack Low Limit Register
Table B-15.RAM Segment Register
B.1.7 RAM Segment Relocation
Table B-17.Secondary Watchdog Timer Register
B.1.8 Secondary Watchdog Timer
LSDR
B.1.9 New Opcodes
LDDSR
LDISR
LSIR
LDDR
LDIR
LSDR
Table B-20.MMU Instruction/Data Register
B.1.10 Expanded I/O Memory Addressing
I/O Bank x Control Register
B.1.11 External I/O Improvements
Table B-21
Table B-22.Global Power Save Control Register
B.1.12 Short Chip Select Timing for Writes
Table B-24.Clock Select Field of GCSR
Table B-23.Global Control/Status Register
User’s Manual
B.1.12.2 Short Chip Select Timing
o s c illa to r
oscillator
32 kHz
32 kHz
Valid
32 kHz
clock
ADDR
User’s Manual
oscillator
oscillator
32KkHz
User’s Manual
32 kHz
Figure B-21.PWM Interrupt and Output Timing
B.1.13 Pulse Width Modulator Improvements
Table B-26.PWM LSB 1 Register
Table B-25.PWM LSB 0 Register
Address = 0x008C
Table B-27.PWM LSB 2 and 3 Registers
PWM LSB x Register
PWL2R
Table B-29.Quadrature Decoder Count High Register
B.1.14 Quadrature Decoder Improvements
Table B-28.Quadrature Decoder Control Register
Cnt 8 bit
User’s Manual
I input
Q input
B.2 Pins with Alternate Functions
User Mode
APPENDIX C. SYSTEM/USER MODE
System Mode
C.1 System/User Mode Opcodes
Table C-3.System/User Mode I/O Registers
C.2 System/User Mode Registers
Table C-4.I/O Addresses Inaccessible in User Mode
INTERRUPT UNDER USER CONTROL
C.3 Interrupts
INTERRUPT UNDER SYSTEM CONTROL
Rabbit 3000 Microprocessor
C.3.1 Peripheral Interrupt Prioritization
Action required to clear the interrupt
Priority
Interrupt Source
C.4.1 Memory Protection Only
C.4 Using the System/User Mode
User’s Manual
C.4.2 Mixed System/User Mode Operation
SYSCALL
C.4.3 Complete Operating System
Interrupt
Rabbit 3000A Internal I/O Registers
APPENDIX D. RABBIT 3000A INTERNAL I/O REGISTERS
Table D-1
Rabbit 3000 Microprocessor
I/O Bank User Enable Register
Port D Bit 2 Register
I/O Bank 2 Control Register
Interrupt 0 Control Register
Serial Port B Address Register
Rabbit 3000 Microprocessor
User’s Manual
NOTICE TO USERS
Page
Numerics
INDEX
Page
TATxR
