The timing diagrams below illustrate the actual timing for the 32KHz cases of write cycles. In these cases the chip selects are active for one clock cycle before and one clock cycle after the trailing edge of the write signal.

 

T1

TWA

T2

32KkHz

 

 

 

clock

 

 

 

ADDR

Valid

 

 

DATA

 

 

 

/CSxMEMCSxB

 

 

 

/WExMMWExB

 

 

 

 

 

2 kHz operation

 

Figure B-16. Short Chip Select Timing: 2 kHz, Write Operation

 

T1

TWA

T2

32kHz

 

 

 

clock

 

 

 

ADDR

Valid

 

 

DATA

 

 

 

/CSx

 

 

 

/WEx

 

 

 

4kHz operation

Figure B-17. Short Chip Select Timing: 4 kHz, Write Operation

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Rabbit 3000 Microprocessor

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Jameco Electronics 2000, 3000 manual Figure B-16. Short Chip Select Timing 2 kHz, Write Operation