Chapter3 HardwareOverview
ATE Series User Manual 3-20 ni.com
Programmable Function Inputs
The10 PFIs are connected to the signal routing multiplexer for each timing
signal,and software can select one of the PFIs as the external source for a
giventiming signal. It is important to note that any of the PFIs can be used
asan input by any of the timing signals and that multiple timing signals can
usethe same PFI simultaneously. This flexible routing scheme reduces the
need to change physical connections to theI /O connector for different
applications.
Youcan also individually enable each of the PFI pins to output a specific
internaltiming signal. For example, if you need the UPDATE* signal as an
output on the I/O connector,software can turn on the output driver for the
PFI5/UPDATE*pin.To use the PFI pins as outputs, you must use the Route
Signal VI to individuallyenable each of the PFI pins to output a specific
timing signal.
Device and RTSI Clocks
Manyfunctions performed by the AT E Series devices require a frequency
timebase to generate the necessary timing signalsfor controlling A/D
conversions,DAC updates, or general-purpose signals at the I/O connector.
An ATE Series device can use either its internal 20 MHz timebase or a
timebase receivedover the RTSI bus. In addition, if you configure the
deviceto use the internal timebase, you can also program the device to
driveits internal timebase over the RTSI bus to another device that is
programmed toreceive this timebase signal. This clock source, whether
local or from the RTSIbus, is used directly by the device as the primary
frequencysource. The default configuration at startup is to use the internal
timebase without drivingthe RTSI bus timebase signal. You select this
timebase through software.
RTSI Triggers
The seven RTSI trigger lines on the RTSI bus provide a very flexible
interconnectionscheme for any AT E Series device sharing the RTSI bus.
Theseb idirectional lines can drive any of eight timing signals onto the
RTSIbus and can receive any of these timingsignals. This signal
connection scheme is shown in Figure 3-15.