Texas Instruments MSP50C6xx manual Class 1b Instruction Description, C1b Mnemonic Description

						Instruction Classification
Table 4–15. Class 1b Instruction Description
	C1b			Mnemonic	Description
0	0	0	0	OR An, {adrs}	Logical OR the contents of the data memory location in {adrs}
				ORS An, {adrs}	and the selected accumulator.	Result(s) stored in
					accumulator(s). ALU status is modified
0	0	0	1	AND An, {adrs}	Logical AND the contents of the data memory location in {adrs}
				ANDS An, {adrs}	and the accumulator. Result(s) stored in accumulator(s). ALU
					status is modified
0	0	1	0	XOR An, {adrs}	Exclusive OR the contents of the data memory location in
				XORS An, {adrs}	{adrs} and the accumulator. Result(s) stored in accumulator(s).
					ALU status is modified
0	0	1	1	MOVB An, {adrs}8	Load the contents of the data memory location in {adrs}and to
				MOVBS An, {adrs}8	the lower 8 bits of the accumulator. Zero fill the upper byte in the
					accumulator ALU status is modified.
0	1	0	0	MOVB {adrs}8, An	Store the lower 8 bits of accumulator to the data memory
				MOVBS {adrs}8, An	location in {adrs}. The data byte is automatically routed to either
					the lower byte or upper byte in the 16-bit memory word based
					on the LSB of the address. Transfer status is modified.
0	1	0	1	Reserved	N/A
0	1	1	0	CMP An, {adrs}	Store the arithmetic status of the contents of {adrs} subtracted
				CMPS An, {adrs}	from accumulator into the ALU status bits. The accumulator is
					not modified.
0	1	1	1	MOV {adrs} , *An	Look up the value stored in program memory addressed by the
				MOVS {adrs} , *An	accumulator and store in the data memory location in {adrs}.
					Transfer status is modified .
1	0	0	0	MULTPL An, {adrs}	Multiply the MR register by the contents of {adrs} and transfer
				MULTPLS An, {adrs}	the lower 16 bits of the result to the accumulator. Latch the
					upper 16 bits into the PH register. ALU status is modified.
1	0	0	1	MOVSPH An, MR, {adrs}	Load the MR register in signed mode from the data memory
				MOVSPHS An, MR, {adrs}	location in {adrs}. In parallel, subtract the PH register from the
					accumulator. The string bit will string with the previous ALU
					status (CF, ZF) but it will not load the string counter (executes
					once). ALU status is modified.
1	0	1	0	MOVAPH An, MR, {adrs}	Load the MR register in signed mode from the data memory
				MOVAPHS An, MR, {adrs}	location in {adrs}. In parallel, add	the PH register to the
					accumulator. The string bit will string with the previous ALU
					status (CF, ZF) but it will not load the string counter (executes
					once). ALU status is modified.

Assembly Language Instructions 4-27