Instruction Classification

between the accumulator and the MR, SV, or PH register. As with all accumula- tor referenced instructions, string operations are possible as well as premodi- fication of one of 4 indirectly referenced accumulator pointer registers (AP).

Table 4–19. Class 3 Instruction Encoding

Bit

16

15

14

13

12

11

10

9

 

8

7

6

 

5

4

3

2

1

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Class 3

1

1

1

0

0

next A

 

An

 

 

C3

 

 

0

A~

~A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Table 4–20. Class 3 Instruction Description

 

 

C3

 

 

Mnemonic

Description

 

 

 

 

 

 

 

0

0

0

0

0

NEGAC An[~], An[~] [, next A]

Store the 2’s complement of the source accumulator

 

 

 

 

 

NEGACS An[~], An[~]

(A~=0 or 1) to the destination accumulator (~A=0 or 1).

 

 

 

 

 

 

ALU status is modified.

 

 

 

 

 

 

 

0

0

0

0

1

NOTAC An[~], An[~] [, next A]

Place the 1’s complement of the source accumulator

 

 

 

 

 

NOTACS An[~], An[~]

(A~=0 or 1) into the destination accumulator (~A=0 or 1).

 

 

 

 

 

 

ALU status is modified.

 

 

 

 

 

 

 

0

0

0

1

0

MOV An[~], *An[~] [, next A]

Look up a value in program memory addressed by

 

 

 

 

 

MOVS An[~], *An[~]

accumulator (A~=0 or 1). Place the lookup value into the

 

 

 

 

 

 

accumulator (~A=0 or 1). The lookup address is

 

 

 

 

 

 

post–incremented in the DP register. ALU status is

 

 

 

 

 

 

modified based on the lookup value.

 

 

 

 

 

 

 

0

0

0

1

1

ZAC An[~] [, next A]

Zero accumulator (~A=0 or 1). ALU status is modified.

 

 

 

 

 

ZACS An[~]

 

 

 

 

 

 

 

 

0

0

1

0

0

SUB An[~], An, An~ [, next A]

Subtract offset accumulator from accumulator (A~=0) or

 

 

 

 

 

SUB An[~], An~, An [, next A]

subtract accumulator from offset accumulator (A~=1).

 

 

 

 

 

SUBS An[~], An, An~

Store the result in accumulator (~A=0 or 1). ALU status is

 

 

 

 

 

SUBS An[~], An~, An

modified.

 

 

 

 

 

 

 

0

0

1

0

1

ADD An[~], An~, An [, next A]

Add accumulator to offset accumulator and store result to

 

 

 

 

 

ADDS An[~], An~, An

accumulator (~A=0 or 1). ALU status is modified.

 

 

 

 

 

 

 

0

0

1

1

0

SHLAC An[~], An[~] [, next A]

Shift accumulator left 1 bit and store the result into

 

 

 

 

 

SHLACS An[~], An[~]

accumulator(~A=0) or offset accumulator (~A=1). The

 

 

 

 

 

 

LSB is set to zero and the MSB is stored in a carryout

 

 

 

 

 

 

status bit. ALU status is modified.

 

 

 

 

 

 

 

0

0

1

1

1

MOV An, An~ [, next A]

Copy accumulator (A~=0 or 1) to accumulator (~A=0 or 1).

 

 

 

 

 

MOVS An, An~

ALU status is modified.

 

 

 

 

 

 

 

These instructions have a special 1 word string operations when string mode is selected. The instructions ignore the string count, executing only once but maintain the carry and comparison to zero operation of the previous arithmetic operation as if the sequence of the previous string instruction and this instruction execution was a part of a larger string operation.

Assembly Language Instructions

4-31

Page 117
Image 117
Texas Instruments MSP50C6xx manual Class 3 Instruction Encoding, Class 3 Instruction Description, Mnemonic Description