Texas Instruments MSP50C6xx manual Digital-to-Analog Converter DAC

Digital-to-Analog Converter (DAC)

For a given sampling rate and DAC resolution, the CPU clock rate may be increased, if necessary, through the use of over-sampling. In the previous example, an original sampling rate of 8 kHz and a PDM rate of 4 MHz was used. A 2-times over-sampling, therefore, would require the PDM rate to be

8 MHz. This can be accomplished in two ways:

PDM rate = 8 MHz : Set the master clock to 8 MHz also (ClkSpdCtrl).

Set the PDMCD bit to 1: 1x master clock (IntGenCtrl).

CPU clock rate will be 4 MHz.

PDM rate = 8 MHz : Set the master clock to 16 MHz.

Set the PDMCD bit to 0: 1/2 master clock.

CPU clock rate will be 8 MHz.

In the case of over-sampling, the same number of instructions are achievable between each INT0 interrupt. Not every INT0, however, requires an independently computed synthesis value, hence, the advantage in increased instruction capacity. A 2-times over-sampling means that every 2nd INT0 requires a computed update from the synthesis algorithm. The other INT0 may be satisfied with an interpolating filter computation, then a return to the main program.

As stated previously, the maximum ensured CPU clock frequency for the MSP50C6xx operates over the entire VDD range. This rate applies to the speed of the core processor. Operating the processor higher than the listed specification is not recommended by Texas Instruments.

The following tables illustrate a number of possible combinations with respect to sampling rate, PDM rate, DAC resolution, master clock rate, and CPU clock rate. The first table applies to the 8 kHz sampling rate and N-times-8 kHz over-sampling. The second applies to the 10 kHz sampling rate and N-times-10 kHz over-sampling.

Note:

The value programmed to the PLLM register is not exactly the multiplicative factor between the 32-kHz reference and the master clock. Refer to Section 2.9.3, Clock Speed Control Register, for more information on the relationship between the PLLM and the resulting MC rate.

The column in these tables output sampling rate reports the true audio sampling rate achievable by the MSP50C6xx, using the 32.768-kHz CRO. The values reported are not always exact multiples of the 8-kHz and 10-kHz options; however, they are the closest obtainable (using the PLLM multiplier) under the given set of constraints.

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