Texas Instruments MSP50C6xx Shltpl Shift Left and Transfer PL to Accumulator, Shltpl A2, *R1++

Individual Instruction Descriptions

4.14.74 SHLTPL				Shift Left and Transfer PL to Accumulator
Syntax
	[label]	name		dest, src [, mod]								Clock, clk				Word, w			With RPT, clk					Class
		SHLTPL		An, {adrs}										Table 4–46					Table 4–46						1b
		SHLTPL		An[~], An[~] [, next A]									1				1				nR+3				3
Execution		[premodify AP if mod specified]
		PH, PL ⇐				src << SV
		dest ⇐			PL
		PC ⇐ PC + 1
Flags Affected		OF, SF, ZF, CF are set accordingly
		src is {adrs}:							TAG bit is set accordingly
Opcode
Instructions			16		15		14	13	12	11	10		9		8	7	6	5	4		3	2	1			0
SHLTPL An, {adrs}			0		1		1	1	0	0	0			An						adrs
				x				dma16 (for direct) or offset16 (long relative) [see section 4.13]
SHLTPL An[~], An[~] [, next A]			1		1		1	0	0	next A				An		1	1	0	1		0	0	A~			~A

Description Premodify the accumulator pointer if specified. Shift accumulator or data memory value pointed by {adrs} to left nSV bits (as specified by the SV register) into a 32-bit result. The result is zero-filled on the right and either zero-filled or sign-extended on the left (based on the setting of the extended sign mode (XM) bit in the status register). The upper 16 bits are latched into the PH register. The lower 16 bits of the result PL are transferred to the destination accumulator (or its offset). This instruction propagates the shifted bit into PH.

Syntax		Description
SHLTPL An, {adrs}		Shift data memory word left, transfer PL to An
SHLTPL An[~], An[~] [, next A]		Premodify APn if next A specified. Shift An[~] left, transfer PL to An[~]
See Also	SHLTPLS, SHLAPL, SHLAPLS, SHLSPL, SHLSPLS

Example 4.14.74.1 SHLTPL A0, *R4++R5

Shift the word pointed by the byte address stored in R4 by nSV bits to the left, and store the result in accumulator A0. Add R5 to R4 and store result in R4 at each execution to get the next memory value. After execution PH contains the upper 16 bits of the 32-bit shift.

Example 4.14.74.2 SHLTPL A2, *R1++

Shift the value pointed by the byte address stored in R1 by nSV bits to the left, and store the result in accumulator A0. Increment R1 (by 2) at each execution to get the next memory value. After execution PH contains the upper 16 bits of the 32-bit shift.

Example 4.14.74.3 SHLTPL A1, A1, ++A

Preincrement accumulator pointer AP1. Shift the accumulator A1 by nSV bits to the left. After execution PH contains the upper 16 bits of the 32-bit shift.

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