Texas Instruments MSP50C6xx ORB, ORS, AND, ANDS, XOR, XORS, NOTAC, Notacs, Or A0, *R0++R5, 148

Individual Instruction Descriptions

See Also	ORB, ORS, AND, ANDS, XOR, XORS, NOTAC, NOTACS
Example 4.14.52.1	OR A0, *R0++R5

OR accumulator A0 with the value in data memory address stored in R0 and store result in accumulator A0, Add R5 to R0 after execution.

Example 4.14.52.2 OR A1, A1, 0xF0FF, ++A

Preincrement pointer AP1. OR immediate 0xF0FF to accumulator A1. Store result in accumulator A1.

Example 4.14.52.3 OR A1, A1~, A1, ––A

Pre–decrement accumulator pointer AP1. OR accumulator A1 to accumulator A1~, put result in A1.

Example 4.14.52.4 OR TF1, *R6+0x22

OR TF1 bit in STAT with tag bit (17th bit) at relative flag address 0x22 relative to R6 (i.e., R6+0x22), store result in TF1 flag in STAT.

Example 4.14.52.5 OR TF1, ZF

OR ZF flag in STAT register with to TF1, put result in TF1 bit in STAT.

Example 4.14.52.6 OR TF2, RZP, R2

OR TF2 with the condition code RZP (Rx=0 flag) for R2, and store result in TF2. If the content of R2 is zero then RZP condition becomes true, otherwise false. TF2 bit in STAT is modified based on this result.

4-148