Texas Instruments MSP50C6xx manual Indirect Addressing Syntax, SyntaxOperation

Instruction Syntax and Addressing Modes

4.3.5Indirect Addressing

Indirect addressing uses one of 8 registers (R0...R7) to point memory addresses. The selected register can be post-modified. Modifications include increments, decrements, or increments by the value in the index register (R5). For post-modifications, the register increments or decrements itself by 2 for word operands and by 1 for byte operands. Syntaxes are shown in Table 4–9.

Table 4–9. Indirect Addressing Syntax

SyntaxOperation

name [dest,] [src,] ,*Rx++R5 [, next A] Premodify accumulator pointer if next A is included. Add Rx with R5. name *Rx++R5 [, src] [, next A]

name [dest,] [src,] ,*Rx [, next A]	Premodify accumulator pointer if next A is included. Use address
name *Rx [, src] [, next A]	pointed by Rx, Rx content unchanged
name [dest,] [src,] ,*Rx++ [, next A]	Premodify accumulator pointer if next A is included. Use address
name *Rx++ [, src] [, next A]	pointed by Rx, post increment Rx after use
name [dest,] [src,] ,*Rx––[, next A]	Premodify accumulator pointer if next A is included. Use address
name *Rx––[, src] [, next A]	pointed by Rx, post decrement Rx after use

Rx (x = 0 – 7)

Address

Memory Operand

++  ––  ++R5

Note that the Rx registers treats data memory as a series of bytes. Therefore, when a word is loaded, Rx++ increments by 2 (Rx–– decrements by 2). When loading a word address into Rx, the address must be converted into a byte ad- dress (by multiplying by 2). For example, if we want Rx to point to the word ad- dress, 0x100, Rx should be loaded with 0x100*2=0x200.

Example 4.3.10 MOV A1~, *R1++R5, ++A

Refer to the initial processor state in Table 4–8 before execution of this instruction. Preincrement AP1. After preincrement A1 is AC22 and A1~ is AC6. The contents of the data memory location stored in R1 are loaded into accumulator AC6. R1 is then incremented by R5. Final result, AP1=22, AC6

=0xacb, R1 = R1 + R5 = 0x0202. Note that the addressing of the Rx registers is byte addressing.

Example 4.3.11 ADD A3~, A3, R6++R5, ––A

Refer to the initial processor state in Table 4–8 before execution of this instruction. Predecrement AP3. After predecrement, A3 is AC28 and A3~ is AC12. The contents of the data memory location stored in R6 are added to AC28. The result is stored in accumulator AC12. R6 is then incremented by R5. Final result, AP3=28, AC12 = AC28 + *R6 = 0x11A2 + 0x12AC = 0x244E, R6 = R6+R5 = 0x3E6. Note that the Rx registers use byte addresses.

Assembly Language Instructions 4-15