Xilinx ML310 manual Foundation ISE, Foundation Features, Design Entry

Models: ML310

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Chapter 1: Introduction to Virtex-II Pro, ISE, and EDK

-840 Mb/s Low-Voltage Differential Signaling I/O (LVDS) with current mode drivers

-Bus LVDS I/O

-HyperTransport™ (LDT) I/O with current driver buffers

-Built-in DDR input and output registers

Proprietary high-performance SelectLink technology for communications between Xilinx devices

-High-bandwidth data path

-Double Data Rate (DDR) link

-Web-based HDL generation methodology

SRAM-based in-system configuration

Fast SelectMAP™ configuration

Triple Data Encryption Standard (DES) security option (bitstream encryption)

IEEE1532 support

Partial reconfiguration

Unlimited reprogrammability

Readback capability

Supported by Xilinx Foundation™ and Alliance™ series development systems

Integrated VHDL and Verilog design flows

ChipScope™ Pro Integrated Logic Analyzer

0.13-µm, nine-layer copper process with 90 nm high-speed transistors

1.5V (VCCINT) core power supply, dedicated 2.5V VCCAUX auxiliary and VCCO I/O power supplies

IEEE 1149.1 compatible boundary-scan logic support

Flip-Chip and Wire-Bond Ball Grid Array (BGA) packages in standard 1.00 mm pitch

Each device 100% factory tested

Foundation ISE

ISE Foundation is the industry's most complete programmable logic design environment. ISE Foundation includes the industry's most advanced timing driven implementation tools available for programmable logic design, along with design entry, synthesis and verification capabilities. With its ultra-fast runtimes, ProActive Timing Closure technologies, and seamless integration with the industry's most advanced verification products, ISE Foundation offers a great design environment for anyone looking for a complete programmable logic design solution.

Foundation Features

Design Entry

ISE greatly improves your “Time-to-Market”, productivity, and design quality with robust design entry features.

ISE provides support for today's most popular methods for design capture including HDL and schematic entry, integration of IP cores as well as robust support for reuse of your own

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www.xilinx.com

ML310 User Guide

 

1-800-255-7778

UG068 (v1.01) August 25, 2004

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Xilinx ML310 manual Foundation ISE, Foundation Features, Design Entry, Introduction to Virtex-II Pro, ISE, and EDK