Xilinx ML310 manual PCI Bus and Device Connectivity

Board Hardware

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		3.3V	PCI-to-PCI
			Bridge TI2250 5.0V
			U32			5.0V PCI Slot 6
					PCI_S_CLK0
					PCI_S_AD18 IDSEL
						PCI_BUS
					PCI_S_CLK1	5.0V PCI Slot 4
U37			0xAC23 104C		PCI_S_AD19	IDSEL
	PCI_P_AD24	PCI_P_AD25
IDSEL			IDSEL			PCI_BUS
PCI Bus
			PCI_BUS
Virtex-II Pro	PCI_P_CLK5
	PCI_P_CLK4					3.3V PCI Slot 5
FPGA
	PCI_P_CLK0
XC2VP30	PCI_P_CLK1				PCI_P_AD21	IDSEL
	PCI_P_CLK2
						PCI_BUS
	PCI_P_CLK3
						3.3V PCI Slot 3
					PCI_P_AD22 IDSEL
						PCI_BUS
				Intel 10/100
				Ethernet NIC
					U11
		PCI_P_AD23 IDSEL			0x1229 8086
			PCI_BUS
			ALi Southbridge
				U15
		PCI_P_AD17	IDSEL	Dev ID Vend ID
			Audio	0x5451 10B9
		PCI_P_AD18
			S. Bridge 0x1533 10B9
		PCI_P_AD19
			Modem	0x5457 10B9
		PCI_P_AD26
			USB#2	0x5237 10B9
		PCI_P_AD27
			IDE Bus	0x5229 10B9
		PCI_P_AD31
			USB#1	0x5237 10B9
			PCI_BUS
	Figure 2-11:PCI Bus and Device Connectivity

Table 2-10shows the connections for the PCI controller.

Table 2-10:PCI Controller Connections

UCF Signal Name	XC2VP30 Pin (U37)	Description
PCI_CLK0	T2	PCI_P_CLK0
PCI_CLK1	R2	PCI_P_CLK1
PCI_CLK2	R5	PCI_P_CLK2
PCI_CLK3	R6	PCI_P_CLK3
PCI_CLK4	R3	PCI_P_CLK4
PCI_CLK5	R4	PCI_P_CLK5
PCI_CLK5_FB	C15	PCI_P_CLK5

ML310 User Guide	www.xilinx.com	37
UG068 (v1.01) August 25, 2004	1-800-255-7778