ML310 Embedded Development Platform, ML310 Board | Xilinx specs

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Chapter 2: ML310 Embedded Development Platform

Figure 2-1: ML310 Board

18	www.xilinx.com	ML310 User Guide
	1-800-255-7778	UG068 (v1.01) August 25, 2004

Image 18

Xilinx manual ML310 Embedded Development Platform, ML310 Board

Contents

ML310 User Guide UG068 v1.01 August 25 ML310 User Guide ML310 User Guide UG068 v1.01 August 25 Version Revision UG068 v1.01 August 25 Table of Contents UG068 v1.01 August 25 Manual Contents Additional Resources Conventions Typographical Online Document Handbook Chapter Summary of Virtex-II Pro Features Virtex-II Pro PowerPC 405 Core RocketIO 3.125 Gb/s Transceivers Virtex-II Fpga Fabric Virtex-II Pro Design Entry Foundation FeaturesFoundation ISE Introduction to Virtex-II Pro, ISE, and EDK Implementation and Configuration SynthesisFoundation ISE Embedded Development Kit Board Level Integration ML310 Embedded Development Platform Overview ML310 Embedded Development Platform ML310 Board Features Overview Board Hardware Clock Generation DDR Memory Board Hardware DDR Signaling DDR Memory ExpansionU37 DDRA2 DDRDQS02 DDRDQ31 Introduction to Serial Ports Signaling Standards of RS-232Serial Port Fpga Uart RS-232 on the ML310 System ACE CF Controller Board Bring-Up Non-Volatile Storage XC2VP30 Connectivity Jtag Connection to XC2VP30 6JTAG Connections to the XC2VP30 and System ACE System ACE Jtag Configuration Interface Gpio LEDs and LCDParallel Cable IV Interface 8LEDs and LCD Connectivity Gpio LCD Interface UCF Signal Name Translator U37 J13 U35Gpio LED Interface U37 Name U36 CPU Debug and CPU Trace CPU Debug DescriptionBuffer U33 J13 9Combined Trace/Debug Connector Pinout CPU Debug Connector Pinout PCI BusCPU Debug Connection to XC2VP30 ML310 Embedded Development Platform 11 PCI Bus and Device Connectivity Pciinta Pciintb Pciintc Pcipar Pcippar Pcirstn Pciprstn Device Name Bus ALi South Bridge Interface, M1535D+, U15113.3V Primary PCI Bus Information Device Vendor 125.0V Secondary PCI Bus Information Device Name Vendor Parallel Port Interface, connector assembly P1 12ALi South Bridge Interface, M1535D+, U15 Serial Port Interface, connector assembly P1 USB, connector assembly J3 IDE, connectors J15 and J16 GPIO, connector J5 System Management Bus SMBus17Type of Gpio Available on Header J5 ALi Gpio Types Number 19Audio Jacks, J1 and J2 Signal name Description AC97 Audio PS/2 Keyboard/Mouse Interface, connector P2 Flash ROM, U4 Intel GD82559, U11, 10/100 Ethernet Controller Intel GD82559 Ethernet Controller Introduction to IIC/SMBus IIC/SMBus SignalingIIC/SMBus Interface IIC/SMBus on ML310 Board 22shows the Fpga connections to all SMBus and IIC devices 14SMBus and IIC Block Diagram SPI Signaling Serial Peripheral Interface SPI Push Buttons, Switches, Front Panel Interface and Jumpers SPI AddressingPush Buttons System ACE Configuration Dipswitch, SW3 CPU Reset, SW2 Front Panel Interface Connector, J23 16SW3 SysACE CFG Switch Detail SYACECFGA0 Jumpers Voltage JumperJ10 J11 Coupling ATX Power Distribution and Voltage Regulation MGT Bref Clock Selection Jumpers, J20 and J21 17ATX Power Distribution and Voltage Regulation 18Voltage Monitor High-Speed I/O High-Speed I/O ML310 PM Connectors 19Personality Module Connected to ML310 Board PM1 Connector PM2 Connector ML310 PM Utility Pins Adapter Board PM ConnectorsContact Order PM2 Power and Ground ML310 PM User I/O PinsPM1 Power and Ground PM1 User I/O RXPPAD4 RXPPAD4A25 31 PM1 Pinout ML310 PM2 User I/O RXPPAD21 RXPPAD21AK25 32 PM2 Pinout AA5