Xilinx ML310 manual 8LEDs and LCD Connectivity

Board Hardware

R

DBG_LED_0 DBG_LED_1 DBG_LED_2 DBG_LED_3

DBG_LED_4 DBG_LED_5 DBG_LED_6 DBG_LED_7

VCC3V3

R399 4.75K

U36

20 VCCA

1	1OE
2		INVERTING-NON
4	1A1		BUFFER	1Y1
6	1A2			1Y2
8	1A3			1Y3
19	1A4			1Y4
	2OE
11				2Y1
13	2A1
15	2A2			2Y2
17	2A3			2Y3
	2A4			2Y4
				GND

SN74LVC244A

18

16

14

12

9

7

5

3

10

Output to Green LEDs

VCC3V3

U33

20

VCCA

1

Output to Red/Green LEDs

1OE

OPB_BUS_ERROR

2

1A1

INVERTING-NON

1Y1

18

LED_OPB_ERROR

4

BUFFER

GND

10

PLB_BUS_ERROR

1A2

1Y2

16

LED_PLB_ERROR

6

1Y3

14

FPGA_DONE

1A3

LED_DONE

8

1Y4

12

FPGA_INIT

1A4

LED_INIT

19

FPGA_LCD_RS

11

2OE

2Y1

9

LCD_RS

2A1

13

2Y2

7

LCD Control

FPGA_LCD_E

2A2

LCD_E

15

2Y3

5

FPGA_LCD_RW

2A3

LCD_RW

17

3

2A4

2Y4

LED_DONE_BUF

GND

R358

4.75K

SN74LVC244A

LCD_VLC

LCD_RW

LCD_DB0

LCD_DB2

R388

R373

LCD_DB4

FPGA_LCD_DIR

0

4.75K

LCD_DB6

VCC2V5

VCC3V3

LCD_BLV

1

U35

24

VCCA

VCCB

NC

2

23

LCD Data

FPGA_LCD_DB0

3

DIR

NC

22

A1

OE

LCD_DB0

FPGA_LCD_DB6

4

LEVELVOLTAGE

TRANSLATOR

21

FPGA_LCD_DB1

A2

B1

LCD_DB1

5

20

FPGA_LCD_DB2

A3

B2

LCD_DB2

6

19

FPGA_LCD_DB3

A4

B3

LCD_DB3

FPGA_LCD_DB4

7

18

A5

B4

LCD_DB4

8

17

FPGA_LCD_DB5

A6

B5

LCD_DB5

9

16

A7

B6

LCD_DB6

FPGA_LCD_DB7

10

15

A8

B7

LCD_DB7

11

14

GND1

B8

1213

GND2GND3

SN74LVCC3245A

Figure 2-8:LEDs and LCD Connectivity

ML310 User Guide	www.xilinx.com
UG068 (v1.01) August 25, 2004	1-800-255-7778

LCD

J13

1 2 VCC5V

3 4 LCD_RS

5 6 LCD_E

7 8 LCD_DB1

9	10	LCD_DB3
11	12
		LCD_DB5
13	14
		LCD_DB7
15	16
		GND

31