AMD Confidential

 

 

November 21st, 2008

User Manual

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Instruction

 

 

 

 

 

 

 

 

 

 

Supported

 

 

Mnemonic

 

 

 

Opcode

 

 

 

 

 

 

Description

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Rotate the 65 bits consisting of the

 

 

 

 

 

 

 

 

 

carry

flag and

a 64-bit register or

 

RCR reg/mem64,imm8

 

 

C1

/3 ib

 

memory

location

right the

number of

 

 

 

 

 

 

 

 

 

bits specified by an 8-bit immediate

 

 

 

 

 

 

 

 

 

value.

 

 

 

 

 

 

 

 

 

 

 

RET

 

 

C3

 

 

 

Near return to the calling procedure.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Near return to the calling procedure

 

RET imm16

 

 

C2

iw

 

and then pop of the specified

number

 

 

 

 

 

 

 

 

 

of bytes from the stack.

 

 

 

 

 

 

RETF

 

 

CB

 

 

 

Far return to the calling procedure.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Far

return to

the calling procedure

 

RETF imm16

 

 

CA iw

 

and

then

pop of

the

specified

number

 

 

 

 

 

 

 

 

 

of bytes from the stack.

 

 

 

 

 

 

ROL reg/imm8,1

 

 

D0

/0

 

 

Rotate

an 8-bit register

or

memory

 

 

 

 

 

operand left 1 bit.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Rotate an 8-bit register

or

memory

 

ROL reg/mem8,CL

 

 

D2

/0

 

 

operand

left

the

number

of

bits

 

 

 

 

 

 

 

 

 

specified in the CL register.

 

 

 

 

 

 

 

 

 

 

 

 

 

Rotate an 8-bit register or memory

 

ROL reg/mem8,imm8

 

 

C0

/0 ib

 

operand

left

the

number

of

bits

 

 

 

 

specified by an 8-bit

immediate

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

value.

 

 

 

 

 

 

 

 

 

 

 

ROL reg/imm16,1

 

 

D1

/0

 

 

Rotate

a 16-bit register

or

memory

 

 

 

 

 

operand left 1 bit.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Rotate a 16-bit register

or

memory

 

ROL reg/mem16,CL

 

 

D3

/0

 

 

operand

left

the

number

of

bits

 

 

 

 

 

 

 

 

 

specified in the CL register.

 

 

 

 

 

 

 

 

 

 

 

 

 

Rotate a 16-bit register or memory

 

ROL reg/mem16,imm8

 

 

C1

/0 ib

 

operand

left

the

number

of

bits

 

 

 

 

specified by an 8-bit

immediate

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

value.

 

 

 

 

 

 

 

 

 

 

 

ROL reg/imm32,1

 

 

D1

/0

 

 

Rotate

a 32-bit register

or

memory

 

 

 

 

 

operand left 1 bit.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Rotate a 32-bit register

or

memory

 

ROL reg/mem32,CL

 

 

D3

/0

 

 

operand

left

the

number

of

bits

 

 

 

 

 

 

 

 

 

specified in the CL register.

 

 

 

 

 

 

 

 

 

 

 

 

 

Rotate a 32-bit register or memory

 

ROL reg/mem32,imm8

 

 

C1

/0 ib

 

operand

left

the

number

of

bits

 

 

 

 

specified by an 8-bit

immediate

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

value.

 

 

 

 

 

 

 

 

 

 

 

ROL reg/imm64,1

 

 

D1

/0

 

 

Rotate

a 64-bit register

or

memory

 

 

 

 

 

operand left 1 bit.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Rotate a 64-bit register

or

memory

 

ROL reg/mem64,CL

 

 

D3

/0

 

 

operand

left

the

number

of

bits

 

 

 

 

 

 

 

 

 

specified in the CL register.

 

 

 

 

 

 

 

 

 

 

 

 

 

Rotate a 64-bit register or memory

 

ROL reg/mem64,imm8

 

 

C1

/0 ib

 

operand

left

the

number

of

bits

 

 

 

 

specified by an 8-bit

immediate

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

value.

 

 

 

 

 

 

 

 

 

 

 

ROR reg/imm8,1

 

 

D0

/0

 

 

Rotate

an 8-bit register

or

memory

 

 

 

 

 

operand right 1 bit.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Rotate an 8-bit register

or

memory

 

ROR reg/mem8,CL

 

 

D2

/0

 

 

operand

right

 

the

number

of

bits

 

 

 

 

 

 

 

 

 

specified in the CL register.

 

 

 

 

 

 

 

 

 

 

 

 

 

Rotate an 8-bit register or memory

 

ROR reg/mem8,imm8

 

 

C0

/0 ib

 

operand

right

 

the

number

of

bits

 

 

 

 

specified by an 8-bit

immediate

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

value.

 

 

 

 

 

 

 

 

 

 

 

ROR reg/imm16,1

 

 

D1

/0

 

 

Rotate

a 16-bit register

or

memory

 

 

 

 

 

operand left 1 bit.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Rotate a 16-bit register

or

memory

 

ROR reg/mem16,CL

 

 

D3

/0

 

 

operand

right

 

the

number

of

bits

 

 

 

 

 

 

 

 

 

specified in the CL register.

 

 

 

 

 

 

 

 

 

 

 

 

 

Rotate a 16-bit register or memory

 

ROR reg/mem16,imm8

 

 

C1

/0 ib

 

operand

right

 

the

number

of

bits

 

 

 

 

specified by an 8-bit

immediate

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

value.

 

 

 

 

 

 

 

 

 

 

 

Appendix A

209

Page 220 Page 222
Page 221
Image 221
AMD 4.4.5 user manual 209
Page 220 Page 222

4.4.5 specifications

AMD 4.4.5 is a robust version of the AMD software ecosystem that focuses on enhanced performance, stability, and efficiency for users relying on AMD processors and graphics cards. This iteration brings various features and technologies designed to optimize gaming, professional applications, and general computing tasks.

One of the standout enhancements in AMD 4.4.5 is the integration of Smart Access Memory technology, which allows the CPU to access the full graphics memory directly. This feature enhances data flow between the CPU and GPU, leading to improved frame rates and overall performance, especially in memory-intensive games. Users can experience a marked increase in gaming performance without the need for additional hardware upgrades.

Another significant feature introduced is the updated Radeon Software Adrenalin Edition. This software update encompasses optimizations for various games, ensuring that gamers can enjoy a seamless experience with the latest titles. The Adrenalin interface also provides features such as Radeon Chill, which helps reduce power consumption during less demanding scenes, and Radeon Anti-Lag, designed to minimize input lag and enhance responsiveness in competitive gaming.

Additionally, AMD 4.4.5 brings the latest drivers that include important performance enhancements and bug fixes that allow for greater system stability. Regular updates ensure that users have the best experience with their AMD hardware, and it significantly bolsters compatibility with the latest gaming titles and software applications.

AMD's Enhanced Sync technology offers users the ability to eliminate screen tearing and stuttering while delivering smooth gameplay. It dynamically synchronizes the refresh rate of the display with the frame rates produced by the GPU, improving the visual experience significantly.

With the introduction of FidelityFX Super Resolution, AMD continues to bolster its suite of technologies that enhance graphics quality and performance. This feature allows lower-resolution images to be upscaled effectively, making it easier for users to enjoy high-end visuals without taxing their hardware excessively.

In summary, AMD 4.4.5 represents a comprehensive update for users by integrating cutting-edge technologies that cater to a wide range of applications from gaming to content creation. With enhancements across the board, AMD reaffirms its commitment to providing high-performance solutions that keep pace with the ever-evolving technology landscape. Whether for gaming aficionados or professional creators, the capabilities offered in this version make it a significant milestone in the AMD software ecosystem.
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