AMD Confidential

 

November 21st, 2008

User Manual

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Instruction

 

 

 

 

 

 

 

 

Supported

 

 

Mnemonic

 

 

 

Opcode

 

 

 

 

Description

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SHR reg/mem8,1

 

 

D0

/5

 

 

Shift

an

8-bit

register

or

memory

 

 

 

 

 

operand right 1 bit.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Shift

an

8-bit register or memory

 

SHR reg/mem8,CL

 

 

D2

/5

 

 

operand

right the number of bits

 

 

 

 

 

 

 

 

 

specified in the CL register.

 

 

 

 

 

 

 

 

 

 

 

 

 

Shift an 8-bit register or memory

 

SHR reg/mem8,imm8

 

 

C0

/5 ib

 

operand

right

the

number

of

bits

 

 

 

 

specified

by

an

8-bit

immediate

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

value.

 

 

 

 

 

 

 

 

 

 

SHR reg/mem16,1

 

 

D1

/5

 

 

Shift

a

16-bit

register

or

memory

 

 

 

 

 

operand right 1 bit.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Shift

a

16-bit register or memory

 

SHR reg/mem16,CL

 

 

D3

/5

 

 

operand

right the number of bits

 

 

 

 

 

 

 

 

 

specified in the CL register.

 

 

 

 

 

 

 

 

 

 

 

 

 

Shift a 16-bit register or memory

 

SHR reg/mem16,imm8

 

 

C1

/5 ib

 

operand

right

the

number

of

bits

 

 

 

 

specified

by

an

8-bit

immediate

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

value.

 

 

 

 

 

 

 

 

 

 

SHR reg/mem32,1

 

 

D1

/5

 

 

Shift

a

32-bit

register

or

memory

 

 

 

 

 

operand right 1 bit.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Shift

a

32-bit register or memory

 

SHR reg/mem32,CL

 

 

D3

/5

 

 

operand

right the number of bits

 

 

 

 

 

 

 

 

 

specified in the CL register.

 

 

 

 

 

 

 

 

 

 

 

 

 

Shift a 32-bit register or memory

 

SHR reg/mem32,imm8

 

 

C1

/5 ib

 

operand

right

the

number

of

bits

 

 

 

 

specified

by

an

8-bit

immediate

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

value.

 

 

 

 

 

 

 

 

 

 

SHR reg/mem64,1

 

 

D1

/5

 

 

Shift

a

64-bit

register

or

memory

 

 

 

 

 

operand left 1 bit.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Shift

a

64-bit register or memory

 

SHR reg/mem64,CL

 

 

D3

/5

 

 

operand

right the number of bits

 

 

 

 

 

 

 

 

 

specified in the CL register.

 

 

 

 

 

 

 

 

 

 

 

 

 

Shift a 64-bit register or memory

 

SHR reg/mem64,imm8

 

 

C1

/5 ib

 

operand

right

the

number

of

bits

 

 

 

 

specified

by

an

8-bit

immediate

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

value.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Shift bits of a 16-bit destination

 

 

 

 

 

 

 

 

 

register or memory operand to the

 

SHRD reg/mem16,reg16,imm8

 

 

0F

AC /r ib

 

right the number of bits specified in

 

 

 

 

an 8-bit immediate value, while

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

shifting in bits from the second

 

 

 

 

 

 

 

 

 

operand.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Shift bits of a 16-bit destination

 

 

 

 

 

 

 

 

 

register

or memory operand to the

 

SHRD reg/mem16,reg16,CL

 

 

0F

AD /r

 

right the number of bits specified in

 

 

 

 

 

 

 

 

 

the CL register, while shifting in

 

 

 

 

 

 

 

 

 

bits from the second operand.

 

 

 

 

 

 

 

 

 

 

 

 

 

Shift bits of a 32-bit destination

 

 

 

 

 

 

 

 

 

register or memory operand to the

 

SHRD reg/mem32,reg32,imm8

 

 

0F

AC /r ib

 

right the number of bits specified in

 

 

 

 

an 8-bit immediate value, while

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

shifting in bits from the second

 

 

 

 

 

 

 

 

 

operand.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Shift bits of a 32-bit destination

 

 

 

 

 

 

 

 

 

register

or memory operand to the

 

SHRD reg/me326,reg32,CL

 

 

0F

AD /r

 

right the number of bits specified in

 

 

 

 

 

 

 

 

 

the CL register, while shifting in

 

 

 

 

 

 

 

 

 

bits from the second operand.

 

 

 

 

 

 

 

 

 

 

 

 

 

Shift bits of a 64-bit destination

 

 

 

 

 

 

 

 

 

register or memory operand to the

 

SHRD reg/mem64,reg64,imm8

 

 

0F

AC /r ib

 

right the number of bits specified in

 

 

 

 

an 8-bit immediate value, while

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

shifting in bits from the second

 

 

 

 

 

 

 

 

 

operand.

 

 

 

 

 

 

 

 

 

Appendix A

215

Page 226 Page 228
Page 227
Image 227
AMD 4.4.5 user manual 215
Page 226 Page 228

4.4.5 specifications

AMD 4.4.5 is a robust version of the AMD software ecosystem that focuses on enhanced performance, stability, and efficiency for users relying on AMD processors and graphics cards. This iteration brings various features and technologies designed to optimize gaming, professional applications, and general computing tasks.

One of the standout enhancements in AMD 4.4.5 is the integration of Smart Access Memory technology, which allows the CPU to access the full graphics memory directly. This feature enhances data flow between the CPU and GPU, leading to improved frame rates and overall performance, especially in memory-intensive games. Users can experience a marked increase in gaming performance without the need for additional hardware upgrades.

Another significant feature introduced is the updated Radeon Software Adrenalin Edition. This software update encompasses optimizations for various games, ensuring that gamers can enjoy a seamless experience with the latest titles. The Adrenalin interface also provides features such as Radeon Chill, which helps reduce power consumption during less demanding scenes, and Radeon Anti-Lag, designed to minimize input lag and enhance responsiveness in competitive gaming.

Additionally, AMD 4.4.5 brings the latest drivers that include important performance enhancements and bug fixes that allow for greater system stability. Regular updates ensure that users have the best experience with their AMD hardware, and it significantly bolsters compatibility with the latest gaming titles and software applications.

AMD's Enhanced Sync technology offers users the ability to eliminate screen tearing and stuttering while delivering smooth gameplay. It dynamically synchronizes the refresh rate of the display with the frame rates produced by the GPU, improving the visual experience significantly.

With the introduction of FidelityFX Super Resolution, AMD continues to bolster its suite of technologies that enhance graphics quality and performance. This feature allows lower-resolution images to be upscaled effectively, making it easier for users to enjoy high-end visuals without taxing their hardware excessively.

In summary, AMD 4.4.5 represents a comprehensive update for users by integrating cutting-edge technologies that cater to a wide range of applications from gaming to content creation. With enhancements across the board, AMD reaffirms its commitment to providing high-performance solutions that keep pace with the ever-evolving technology landscape. Whether for gaming aficionados or professional creators, the capabilities offered in this version make it a significant milestone in the AMD software ecosystem.
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