AMD Confidential

 

 

 

 

November 21st, 2008

User Manual

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Instruction

 

 

 

 

 

 

 

 

 

 

 

 

Supported

 

 

Mnemonic

 

 

 

Opcode

 

 

 

 

 

 

Description

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

JMP reg/mem16

 

 

FF /4

 

 

 

Near

 

jump

with

the

target

specified

 

 

 

 

 

 

reg/mem16.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

JMP reg/mem32

 

 

FF /4

 

 

 

Near

 

jump

with

the

target

specified

 

 

 

 

 

 

reg/mem32.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

JMP reg/mem64

 

 

FF /4

 

 

 

Near

 

jump

with

the

target

specified

 

 

 

 

 

 

reg/mem64.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Far

 

jump

direct,

with

the

target

 

JMP FAR pntr16:16

 

 

EA cd

 

 

 

specified

by a far pointer contained

 

 

 

 

 

 

 

 

 

 

in the instruction.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Far

 

jump

direct,

with

the

target

 

JMP FAR pntr16:32

 

 

EA cp

 

 

 

specified

by a far pointer contained

 

 

 

 

 

 

 

 

 

 

in the instruction.

 

 

 

 

 

 

 

 

 

JMP FAR mem16:16

 

 

FF /5

 

 

 

Far

jump

indirect,

with

the

target

 

 

 

 

 

 

specified by a far pointer in memory.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

JMP FAR mem16:32

 

 

FF /5

 

 

 

Far

jump

indirect,

with

the

target

 

 

 

 

 

 

specified by a far pointer in memory.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LAHF

 

 

9F

 

 

 

 

Load the SF, ZF, AF, PF, and CF flags

 

 

 

 

 

 

 

into the AH register.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LDS reg16,mem16:16

 

 

C5

/r

 

 

 

Load DS:reg16 with a far pointer from

 

 

 

 

 

 

memory.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LDS reg32,mem16:32

 

 

C5

/r

 

 

 

Load DS:reg32 with a far pointer from

 

 

 

 

 

 

memory.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LES reg16,mem16:16

 

 

C4

/r

 

 

 

Load ES:reg16 with a far pointer from

 

 

 

 

 

 

memory.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LES reg32,mem16:32

 

 

C4

/r

 

 

 

Load ES:reg32 with a far pointer from

 

 

 

 

 

 

memory.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LFS reg16,mem16:16

 

 

0F

B4

/r

 

Load FS:reg16 with a far pointer from

 

 

 

 

memory.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LFS reg32,mem16:32

 

 

0F

B4

/r

 

Load FS:reg32 with a far pointer from

 

 

 

 

memory.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LGS reg16,mem16:16

 

 

0F

B5

/r

 

Load GS:reg16 with a far pointer from

 

 

 

 

memory.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LGS reg32,mem16:32

 

 

0F

B5

/r

 

Load GS:reg32 with a far pointer from

 

 

 

 

memory.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LSS reg16,mem16:16

 

 

0F

B2

/r

 

Load SS:reg16 with a far pointer from

 

 

 

 

memory.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LSS reg32,mem16:32

 

 

0F

B2

/r

 

Load SS:reg32 with a far pointer from

 

 

 

 

memory.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LEA reg16,mem

 

 

8D

/r

 

 

 

Store

effective

address

in

a

16-bit

 

 

 

 

 

 

register.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LEA reg32,mem

 

 

8D

/r

 

 

 

Store

effective

address

in

a

32-bit

 

 

 

 

 

 

register.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LEA reg64,mem

 

 

8D

/r

 

 

 

Store

effective

address

in

a

64-bit

 

 

 

 

 

 

register.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LEAVE

 

 

C9

 

 

 

 

Set the stack pointer SP to the value

 

 

 

 

 

 

 

in the BP register and pop BP.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Set

the

stack

pointer

ESP

to

the

 

LEAVE

 

 

C9

 

 

 

 

value

in

the

EBP

register

and

pop

 

 

 

 

 

 

 

 

 

 

EBP.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Set

the

stack

pointer

RSP

to

the

 

LEAVE

 

 

C9

 

 

 

 

value

in

the

RBP

register

and

pop

 

 

 

 

 

 

 

 

 

 

RBP.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LFENCE

 

 

0F

AE E8

 

Force strong ordering of (serialize)

 

 

 

 

load operations.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LODS mem8

 

 

AC

 

 

 

 

Load

 

byte

at

DS:rSI

into

AL

and

then

 

 

 

 

 

 

 

increment or decrement rSI.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LODS mem16

 

 

AD

 

 

 

 

Load

 

word

at

DS:rSI

into

AX

and

then

 

 

 

 

 

 

 

increment or decrement rSI.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LODS mem32

 

 

AD

 

 

 

 

Load

 

doubleword

at

DS:rSI

into

EAX

 

 

 

 

 

 

 

and then increment or decrement rSI.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LODS mem64

 

 

AD

 

 

 

 

Load

 

quadword

at DS:rSI into

RAX

and

 

 

 

 

 

 

 

then increment or decrement rSI.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LODSB

 

 

AC

 

 

 

 

Load

 

byte

at

DS:rSI

into

AL

and

then

 

 

 

 

 

 

 

increment or decrement rSI.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LODSW

 

 

AD

 

 

 

 

Load

 

word

at

DS:rSI

into

AX

and

then

 

 

 

 

 

 

 

increment or decrement rSI.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Appendix A

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Page 212 Page 214
Page 213
Image 213
AMD 4.4.5 user manual 201
Page 212 Page 214

4.4.5 specifications

AMD 4.4.5 is a robust version of the AMD software ecosystem that focuses on enhanced performance, stability, and efficiency for users relying on AMD processors and graphics cards. This iteration brings various features and technologies designed to optimize gaming, professional applications, and general computing tasks.

One of the standout enhancements in AMD 4.4.5 is the integration of Smart Access Memory technology, which allows the CPU to access the full graphics memory directly. This feature enhances data flow between the CPU and GPU, leading to improved frame rates and overall performance, especially in memory-intensive games. Users can experience a marked increase in gaming performance without the need for additional hardware upgrades.

Another significant feature introduced is the updated Radeon Software Adrenalin Edition. This software update encompasses optimizations for various games, ensuring that gamers can enjoy a seamless experience with the latest titles. The Adrenalin interface also provides features such as Radeon Chill, which helps reduce power consumption during less demanding scenes, and Radeon Anti-Lag, designed to minimize input lag and enhance responsiveness in competitive gaming.

Additionally, AMD 4.4.5 brings the latest drivers that include important performance enhancements and bug fixes that allow for greater system stability. Regular updates ensure that users have the best experience with their AMD hardware, and it significantly bolsters compatibility with the latest gaming titles and software applications.

AMD's Enhanced Sync technology offers users the ability to eliminate screen tearing and stuttering while delivering smooth gameplay. It dynamically synchronizes the refresh rate of the display with the frame rates produced by the GPU, improving the visual experience significantly.

With the introduction of FidelityFX Super Resolution, AMD continues to bolster its suite of technologies that enhance graphics quality and performance. This feature allows lower-resolution images to be upscaled effectively, making it easier for users to enjoy high-end visuals without taxing their hardware excessively.

In summary, AMD 4.4.5 represents a comprehensive update for users by integrating cutting-edge technologies that cater to a wide range of applications from gaming to content creation. With enhancements across the board, AMD reaffirms its commitment to providing high-performance solutions that keep pace with the ever-evolving technology landscape. Whether for gaming aficionados or professional creators, the capabilities offered in this version make it a significant milestone in the AMD software ecosystem.
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