AMD 4.4.5 user manual AMD 8th Generation Integrated Northbridge Device

	AMD Confidential
User Manual	November 21st, 2008

7.10 AMD 8th Generation Integrated Northbridge Device

The AMD 8th Generation Integrated Northbridge device supports the AMD 8th generation family of processors - AMD Athlon™ 64 and AMD Opteron™ processors. Although the physical processor chip has a Northbridge built in, for simulation purposes, the Northbridge is considered as a separate unit. Features include HyperTransport™ technology (for coherent and non-coherent connections) and a memory controller. The integrated debugging functions of the 8th generation processors are not included.

Interface

The Northbridge device has several connection points. It has multiple HyperTransport bus ports that connects to the other AMD 8th Generation Integrated Northbridge devices, or to HyperTransport link-capable devices (e.g., AMD-8131 PCI-X device). These ports are mutually exclusive, and should be connected to only one other device. The Northbridge also has a memory bus to the DIMM devices. The CPU bus gives connection points for the CPU. The final port is a system-message bus port for connection with a Log device. A 940-pin 8th generation processor part (AMD Opteron) has three HyperTransport ports; a 754-pin 8th generation processor part (AMD Athlon 64) has one HyperTransport port.

Initialization and Reset State

When first initialized, the Northbridge device is in the default state. This is described in detail in the 8th generation processor PCI register specification.

When reset, the Northbridge device takes on all default register values.

Contents of a BSD

The BSD file contains the contents of all Northbridge registers. It also saves the contents of any tables and the states of all internal devices (the memory controller, HyperTransport table contents, etc.). When the BSD file is read in, all tables are filled with past data, and all states are restored to their saved states.

Configuration Options

Figure 7-17and Figure 7-18show configuration options for the Northbridge.

86 Chapter 7: Device Configuration