AMD 4.4.5 user manual 211

AMD Confidential

November 21st, 2008

User Manual

Instruction

Supported

Mnemonic

Opcode

Description

SHL reg/mem16,1

D1

/4

Shift

a 16-bit

register

or

memory

location left 1 bit.

Shift a 16-bit

register

or

memory

SHL reg/mem16,CL

D3

/4

location

left

the

number

of

bits

specified in the CL register.

Shift a 16-bit register or memory

SHL reg/mem16,imm8

C1

/4 ib

location

left

the

number

of

bits

specified

by

an

8-bit

immediate

value.

SHL reg/mem32,1

D1

/4

Shift

a 32-bit

register

or

memory

location left 1 bit.

Shift a 32-bit

register

or

memory

SHL reg/mem32,CL

D3

/4

location

left

the

number

of

bits

specified in the CL register.

Shift a 32-bit register or memory

SHL reg/mem32,imm8

C1

/4 ib

location

left

the

number

of

bits

specified

by

an

8-bit

immediate

value.

SHL reg/mem64,1

D1

/4

Shift

a 64-bit

register

or

memory

location left 1 bit.

Shift a 64-bit

register

or

memory

SHL reg/mem64,CL

D3

/4

location

left

the

number

of

bits

specified in the CL register.

Shift a 64-bit register or memory

SHL reg/mem64,imm8

C1

/4 ib

location

left

the

number

of

bits

specified

by

an

8-bit

immediate

value.

SAR reg/mem8,1

D0

/7

Shift

a

signed

8-bit

register

or

memory operand right 1 bit.

Shift

a

signed

8-bit register or

SAR reg/mem8,CL

D2

/7

memory

operand

right

the

number

of

bits specified in the CL register.

Shift a signed 8-bit register or

SAR reg/mem8,imm8

C0

/7 ib

memory

location right the number of

bits specified by an 8-bit immediate

value.

SAR reg/mem16,1

D1

/7

Shift

a

signed

16-bit

register

or

memory operand right 1 bit.

Shift

a

signed

16-bit register or

SAR reg/mem16,CL

D3

/7

memory

operand

right

the

number

of

bits specified in the CL register.

Shift a signed 16-bit register or

SAR reg/mem16,imm8

C1

/7 ib

memory

location right the number of

bits specified by an 8-bit immediate

value.

SAR reg/mem32,1

D1

/7

Shift

a

signed

32-bit

register

or

memory location right 1 bit.

Shift

a

signed

32-bit register or

SAR reg/mem32,CL

D3

/7

memory

operand

right

the

number

of

bits specified in the CL register.

Shift a signed 32-bit register or

SAR reg/mem32,imm8

C1

/7 ib

memory

operand

right

the

number

of

bits specified by an 8-bit immediate

value.

SAR reg/mem64,1

D1

/7

Shift

a

signed

64-bit

register

or

memory operand left 1 bit.

Shift

a

signed

64-bit register or

SAR reg/mem64,CL

D3

/7

memory

operand

right

the

number

of

bits specified in the CL register.

Shift a signed 64-bit register or

SAR reg/mem64,imm8

C1

/7 ib

memory

operand

right

the

number

of

bits specified by an 8-bit immediate

value.

SBB AL,imm8

1C

ib

Subtract

an

immediate

8-bit

value

from the AL register with borrow.

SBB AX,imm16

1D

iw

Subtract

an

immediate 16-bit

value

from the AX register with borrow.

Appendix A 211