CY7C65113C
Document #: 38-08002 Rev. *D Page 7 of 49

Logic Block Diagram

Interrupt
Controller
PROM
12-bit
Timer
Reset
Watchdog
Timer
Repeater
Power-on
SCLK
I2C comp.
USB
Transceiver
USB
Transceiver
USB
Transceiver
GPIO
PORT 1
GPIO
PORT 0
P0[0]
P0[7]
P1[0]
P1[2]
SDATA
D+[3]
D–[3]
D+[2]
D–[2]
8-bit Bus
6-MHz crystal
RAM
USB
SIE
USB
Transceiver
D+[4]
D–[4]
USB
Transceiver
D+[0]
D–[0]
D+[1]
D–[1]
Upstream
USB Port
256 byte
8 KB
Clock
6 MHz
12-MHz
8-bit
CPU
Power management under firmware
control using GPIO pins
Interface
PLL
12 MHz
48 MHz
Divider
Downstream USB Ports
*I2C-compatible interface enabled by firmware through
P1[1:0]
[+] Feedback