CY7C65113C
Document #: 38-08002 Rev. *D Page 28 of 49
3.In slave transmit mode, after the slave transmits a byte of data: The ACK bit indicates if the master that requeste d the byte
acknowledged the byte. If more bytes are to be sent, firmware writes the next byte into the Data Register and then sets the
Xmit MODE and Continue/Busy bits as required.
4.In master transmit mode, after the master sends a byte of data. Firmware should load the Data Register if necessary, and
set the Xmit MODE, MSTR MODE, and Continue/Busy bits appropriately. Clearing the MSTR MODE bit issues a stop signal
to the I2C-compatible bus and return to the idle state.
5.In master receive mode, after the master receives a byte of data: Firmware should read the data and set the ACK and
Continue/Busy bits appropriately for the next byte. Clearing the MSTR MODE bit at the same time causes the master state
machine to issue a stop signal to the I2C-compatible bus and leave the I2C-compatible hardware in the idle state.
6.When the master loses arbitration : This condition clears the MSTR MODE bit and sets the ARB Lost/Restart bit immediately
and then waits for a stop signal on the I2C-compatible bus to generate the interrupt.
The Continue/Busy bit is cleared by hardware prior to interrupt conditions 1 to 4. Once the Data Register has been read or written,
firmware should configure the other control bits and set the Continue/Busy bit for subsequent transactions. Following an interrupt
from master mode, firmware should perform only one write to the Status and Control Register that sets the Continue/Busy bit,
without checking the value of the Continue/Busy bit. The Busy bit may otherwise be active and I2C register contents may be
changed by the hardware during the transaction, until the I2C interrupt occurs.
15.0 USB Overview
The USB hardware includes a USB Hub repeater with one upstream and up to seven downstream ports. The USB Hub repeater
interfaces to the microcontroller through a full-speed serial interface engine (SIE). An external series resistor of Rext must be
placed in series with all upstream and downstream USB outputs in order to meet the USB driver requirements of the USB
specification. The CY7C65113C microcontroller can provide the functionality of a compound device consisting of a USB hub and
permanently attached functions.

15.1 USB Serial Interface Engine (SIE)

The SIE allows the CY7C65113C microcontroller to communicate with the USB host through the USB repeater portion of the hub.
The SIE simplifies the interface between the microcontroller and USB by incorporating hardware that handles the following USB
bus activity independently of the microcontroller:
• Bit stuffing/unstuffing
• Checksum generation/checking
• ACK/NAK/STALL
• Token type identification
• Address checking.
Firmware is required to handle the following USB interface tasks:
• Coordinate enumeration by responding to SETUP packets
• Fill and empty the FIFOs
• Suspend/Resume coordination
• Verify and select DATA toggle values.

15.2 USB Enumeration

The internal hub and any compound device function are enumerated under firmware control. The hub is enumerated first, followed
by any integrated compound function. After the hub is enumerated, the USB host can read hub connection status to determine
which (if any) of the downstream ports need to be enumerated. The following is a brief summary of the typical enumeration
process of the CY7C65113C by the USB host. For a detailed description of the enumeration process, refer to the USB specifi-
cation.
In this description, ‘Firmware’ refers to embedded firmware in the CY7C65113C controller.
1.The host computer sends a SETUP packet followed by a DATA packet to USB address 0 requesting the Device descriptor.
2.Firmware decodes the request and retrie ves its Device descriptor from the program memory tables.
3.The host computer performs a control read sequence and Firmwar e responds by sending the Device descriptor over the USB
bus, via the on-chip FIFOs.
4.After receiving the descriptor, the host sends a SETUP packet followed by a DATA packet to address 0 assigning a new USB
address to the device.
5.Firmware stores the new address in its USB Device Address Register (for example, as Address B) after the no-data control
sequence completes.
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