•Memory modules must be identical in size, speed, and technology.
•DIMMs installed in memory sockets with white release tabs must be identical and similar rule applies for sockets with black and green release tabs. This ensures that identical DIMMs are installed in matched pairs - for example, A1 with A2, A3 with A4, A5 with A6, and so on.
NOTE: Advanced ECC with Mirroring is supported.
Memory Optimized (Independent Channel) Mode
This mode supports SDDC only for memory modules that use x4 device width and does not impose any specific slot population requirements.
Memory Sparing
NOTE: To use memory sparing, this feature must be enabled in the System Setup.
In this mode, one rank per channel is reserved as a spare. If persistent correctable errors are detected on a rank, the data from this rank is copied to the spare rank and the failed rank is disabled.
With memory sparing enabled, the system memory available to the operating system is reduced by one rank per channel. For example, in a
NOTE: Memory sparing does not offer protection against a
NOTE: Both Advanced ECC/Lockstep and Optimizer modes support Memory Sparing.
Memory Mirroring
Memory Mirroring offers the strongest DIMM reliability mode compared to all other modes, providing improved uncorrectable
Memory installation guidelines:
•Memory modules must be identical in size, speed, and technology.
•DIMMs installed in memory sockets with white release levers must be identical and similar rule applies for sockets with black and green release tabs. This ensures that identical DIMMs are installed in matched pairs - for example, A1 with A2, A3 with A4, A5 with A6, and so on.
Fault Resilient Memory
Fault Resilient Memory (FRM) mode operates with the parts of redundant system memory, leaving the rest of the system memory in
Memory Mirroring is a RAS feature that enables duplicating memory content at a remote DIMM in the partition. This capability enables high data availability from memory subsystem. Fault Resilient Memory enables you to select the segments of system memory that contains the most critical code.
Sample Memory Configurations
The following table shows sample memory configurations for a single processor that follow the appropriate memory guidelines stated in this section.
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